From: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Aristo Chen <aristo.chen@canonical.com>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] MIPS: GT64120: Remove duplicate GT_PCI1M1LD_OFS and GT_PCI1M1HD_OFS
Date: Thu, 1 Oct 2026 14:11:53 +0200 [thread overview]
Message-ID: <ar5OCUOixCsB1hD_@alpha.franken.de> (raw)
In-Reply-To: <20261001053016.76578-1-aristo.chen@canonical.com>
On Thu, Oct 01, 2026 at 05:30:15AM +0000, Aristo Chen wrote:
> The GT_PCI1M1LD_OFS and GT_PCI1M1HD_OFS register offsets are defined
> twice in a row with identical values. Identical macro redefinitions are
> valid C, so the compiler never warned about it. Drop the second copy.
>
> No functional change.
>
> Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
> ---
> arch/mips/include/asm/gt64120.h | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/mips/include/asm/gt64120.h b/arch/mips/include/asm/gt64120.h
> index 5d68d726598a..2ad770ff3c56 100644
> --- a/arch/mips/include/asm/gt64120.h
> +++ b/arch/mips/include/asm/gt64120.h
> @@ -45,8 +45,6 @@
> #define GT_PCI1M0HD_OFS 0x0a8
> #define GT_PCI1M1LD_OFS 0x0b0
> #define GT_PCI1M1HD_OFS 0x0b8
> -#define GT_PCI1M1LD_OFS 0x0b0
> -#define GT_PCI1M1HD_OFS 0x0b8
>
> #define GT_SCS10AR_OFS 0x0d0
> #define GT_SCS32AR_OFS 0x0d8
>
> base-commit: f552e14f77bfce3e7ee0bb268ab023951baec3ff
> --
> 2.53.0
applied to mips-next
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
prev parent reply other threads:[~2026-10-01 12:12 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-01 5:30 [PATCH] MIPS: GT64120: Remove duplicate GT_PCI1M1LD_OFS and GT_PCI1M1HD_OFS Aristo Chen
2026-10-01 12:11 ` Thomas Bogendoerfer [this message]
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