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[35.189.192.250]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fddfe361esm2281105e9.11.2026.09.22.08.30.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 08:30:53 -0700 (PDT) Date: Tue, 22 Sep 2026 15:30:50 +0000 From: Mostafa Saleh To: sashiko-reviews@lists.linux.dev Cc: Marc Zyngier , kvmarm@lists.linux.dev, Oliver Upton Subject: Re: [PATCH v8 13/25] iommu/arm-smmu-v3-kvm: Add MMIO emulation Message-ID: References: <20260922131259.2975334-1-smostafa@google.com> <20260922131259.2975334-14-smostafa@google.com> <20260922132232.B2E301F000FF@smtp.kernel.org> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260922132232.B2E301F000FF@smtp.kernel.org> On Tue, Sep 22, 2026 at 01:22:32PM +0000, sashiko-bot@kernel.org wrote: > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: > - [Medium] hyp: fatal WARN_ON(!mask) on host SMMU MMIO access > -- > > commit 0f61ec17741805782c471d3c6da0d9dad62368e6 > Author: Mostafa Saleh > > iommu/arm-smmu-v3-kvm: Add MMIO emulation > > Add data abort handler for the SMMUs, at the moment most registers > are just passthrough. > > > diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c > > index f8b7c5406017e..7a51cb70205fe 100644 > > --- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c > > +++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3.c > [ ... ] > > +static bool smmu_dabt_device(struct hyp_arm_smmu_v3_device *smmu, > > + struct user_pt_regs *regs, > > + u64 esr, u32 off) > > +{ > [ ... ] > > + case ARM_SMMU_CR1: > > + if (len != sizeof(u32)) > > + break; > > + /* Don't mess with shareability/cacheability. */ > > + if (is_write && > > + (val != (FIELD_PREP(CR1_TABLE_SH, ARM_SMMU_SH_ISH) | > > + FIELD_PREP(CR1_TABLE_OC, CR1_CACHE_WB) | > > + FIELD_PREP(CR1_TABLE_IC, CR1_CACHE_WB) | > > + FIELD_PREP(CR1_QUEUE_SH, ARM_SMMU_SH_ISH) | > > + FIELD_PREP(CR1_QUEUE_OC, CR1_CACHE_WB) | > > + FIELD_PREP(CR1_QUEUE_IC, CR1_CACHE_WB)))) > > + break; > > + > > + mask = read_write; > > + break; > [ ... ] > > + } > > + > > + if (WARN_ON(!mask)) > > + goto out_ret; > > [Severity: Medium] > Is it safe to use WARN_ON() here to validate host-controlled input? > > If the host writes an unallowed value to ARM_SMMU_CR1 (breaking out of the > switch before setting mask), or accesses an unhandled register offset, > mask remains 0. The subsequent WARN_ON(!mask) will trigger a fatal > BRK instruction at EL2, crashing the hypervisor and the host. > > Since WARN_ON() is fatal at EL2 and does not execute the goto out_ret > recovery path, should this validation gracefully handle the abort instead of > asserting? Yes, no well behaved host will attempt this, so a WARN_ON() is better than ignoring it and making it really hard to debug. Thanks, Mostafa > > -- > Sashiko AI review · https://sashiko.dev/#/patchset/20260922131259.2975334-1-smostafa@google.com?part=13