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From: Niklas Cassel <cassel@kernel.org>
To: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Krzysztof Wilczynski <kwilczynski@kernel.org>,
	Manivannan Sadhasivam <mani@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, Rob Herring <robh@kernel.org>,
	Thierry Reding <thierry.reding@kernel.org>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Kishon Vijay Abraham I <kishon@kernel.org>,
	Frank Li <Frank.Li@kernel.org>, Vidya Sagar <vidyas@nvidia.com>,
	Koichiro Den <den@valinux.co.jp>,
	Marco Crivellari <marco.crivellari@suse.com>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 10/11] PCI: tegra194: Fix Endpoint MSI/MSI-X numbering
Date: Wed, 23 Sep 2026 15:32:47 +0200	[thread overview]
Message-ID: <arPU_1rfabEiI8Zd@ryzen> (raw)
In-Reply-To: <20260923072237.1139013-11-mmaddireddy@nvidia.com>

On Wed, Sep 23, 2026 at 12:52:36PM +0530, Manikanta Maddireddy wrote:
> pci_epc_raise_irq() passes MSI and MSI-X interrupt numbers in the
> 1-N range. The Tegra MSI path rejected values above 32 but accepted
> zero, which makes BIT(irq - 1) shift by a negative amount.
> 
> The Tegra MSI-X path also wrote that 1-based number to the DWC MSI-X
> doorbell. The doorbell expects a zero-based vector index, matching the
> common DesignWare doorbell helper which programs interrupt_num - 1.
> 
> Reject zero for both MSI and MSI-X, read the MSI-X table size directly
> from the DWC capability, and write irq - 1 to the MSI-X doorbell.
> 
> Also advertise MSI-X support in the Tegra Endpoint features so endpoint
> functions can expose and exercise the Tegra MSI-X path.
> 
> Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194")
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> ---
>  drivers/pci/controller/dwc/pcie-tegra194.c | 25 ++++++++++++++++++----
>  1 file changed, 21 insertions(+), 4 deletions(-)


Subject: PCI: tegra194: Fix Endpoint MSI/MSI-X numbering

Makes it look like the MSI numbering was wrong. It wasn't.

Don't get me wrong, I think this change makes sense:

> @@ -2026,7 +2026,7 @@ static int tegra_pcie_ep_raise_intx_irq(struct tegra_pcie_dw *pcie, u16 irq)
>  
>  static int tegra_pcie_ep_raise_msi_irq(struct tegra_pcie_dw *pcie, u16 irq)
>  {
> -	if (unlikely(irq > 32))
> +	if (unlikely(!irq || irq > 32))
>  		return -EINVAL;
>  
>  	appl_writel(pcie, BIT(irq - 1), APPL_MSI_CTRL_1);

But that change should be in a separate commit IMO, as does not not actually
fix any existing problem. All EPF drivers follow the pci_epc_raise_irq() kdoc,
and currently call pci_epc_raise_irq() with a value in (1-N).



That way the commit message for fixing tegra_pcie_ep_raise_msix_irq() is
also clearer, as you would not be talking about two separate paths in the
same commit.


Kind regards,
Niklas

  reply	other threads:[~2026-09-23 13:32 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-23  7:22 [PATCH 00/11] PCI: tegra194: Fix EP and Root Port corner cases Manikanta Maddireddy
2026-09-23  7:22 ` [PATCH 01/11] PCI: tegra194: Propagate REFCLK select GPIO errors Manikanta Maddireddy
2026-09-23  7:22 ` [PATCH 02/11] PCI: tegra194: Check core reset deassertion Manikanta Maddireddy
2026-09-24 20:25   ` Andy Shevchenko
2026-09-28  5:45     ` Manikanta Maddireddy
2026-09-28  8:40       ` Andy Shevchenko
2026-09-23  7:22 ` [PATCH 03/11] PCI: tegra194: Fix Endpoint PERST# IRQ suspend race Manikanta Maddireddy
2026-09-23  7:22 ` [PATCH 04/11] PCI: tegra194: Do not skip no-link Root Port remove cleanup Manikanta Maddireddy
2026-09-23  7:22 ` [PATCH 05/11] PCI: tegra194: Check for 16 GT/s capability before programming Manikanta Maddireddy
2026-09-23  7:22 ` [PATCH 06/11] PCI: tegra194: Check for L1SS " Manikanta Maddireddy
2026-09-23  7:22 ` [PATCH 07/11] PCI: tegra194: Always disable Tegra234 Endpoint L1.2 Manikanta Maddireddy
2026-09-23  7:22 ` [PATCH 08/11] PCI: tegra194: Guard Endpoint PLL-off error path Manikanta Maddireddy
2026-09-23  7:22 ` [PATCH 09/11] PCI: tegra194: Balance core monitor clock on failures Manikanta Maddireddy
2026-09-23  7:22 ` [PATCH 10/11] PCI: tegra194: Fix Endpoint MSI/MSI-X numbering Manikanta Maddireddy
2026-09-23 13:32   ` Niklas Cassel [this message]
2026-09-28  5:48     ` Manikanta Maddireddy
2026-09-23  7:22 ` [PATCH 11/11] PCI: endpoint: test: Do not relocate fixed MSI-X tables Manikanta Maddireddy
2026-09-23 14:32   ` Niklas Cassel

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