Re: [PATCH 1/2] MIPS: Octeon: size the swiotlb for a modular OHCI platform driver

[Thomas Bogendoerfer <tsbogend@alpha.franken.de>]

On Tue, Sep 15, 2026 at 08:18:24AM +0000, Orgad Shaneh wrote:
> plat_swiotlb_setup() raises the swiotlb to 64 MB on OCTEON II with
> memory above 4 GB, because that OHCI can only DMA to 32 bits. The test
> is "#ifdef CONFIG_USB_OHCI_HCD_PLATFORM", which is false when the driver
> is a module - the usual way to build it - so the bump is silently
> skipped.
> 
> What is left depends on the rest of the function: with PCI enabled the
> "memory past the BAR1 hole" branch happens to ask for the same 64 MB,
> but with CONFIG_PCI off - which is normal on these SoCs when no PCI
> devices are wired - swiotlbsize stays at the PAGE_SIZE it was
> initialised to. A full- or low-speed device on an OCTEON II board with
> more than 4 GB of RAM then has no bounce buffer to speak of.
> 
> Use IS_ENABLED() so a modular OHCI gets the same sizing as a built-in
> one. Seen on a CN6635 board with 8 GB of RAM and
> CONFIG_USB_OHCI_HCD_PLATFORM=m.
> 
> Fixes: a8667d706dfa ("MIPS: OCTEON: dma-octeon: fix OHCI USB config check")
> Assisted-by: Claude:claude-opus-5
> Signed-off-by: Orgad Shaneh <orgads@gmail.com>
> ---
> diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c
> --- a/arch/mips/cavium-octeon/dma-octeon.c
> +++ b/arch/mips/cavium-octeon/dma-octeon.c
> @@ -228,7 +228,7 @@ void __init plat_swiotlb_setup(void)
>  		swiotlbsize = 64 * (1<<20);
>  	}
>  #endif
> -#ifdef CONFIG_USB_OHCI_HCD_PLATFORM
> +#if IS_ENABLED(CONFIG_USB_OHCI_HCD_PLATFORM)
>  	/* OCTEON II ohci is only 32-bit. */
>  	if (OCTEON_IS_OCTEON2() && max_addr >= 0x100000000ul)
>  		swiotlbsize = 64 * (1<<20);
> -- 
> 2.47.0

applied to mips-next

Thomas.

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