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[2a02:3100:acba:a601:4494:3582:465b:eab]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a00178bebasm122878225e9.11.2026.09.27.23.07.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 23:07:24 -0700 (PDT) Date: Mon, 28 Sep 2026 08:07:20 +0200 From: Karl Mehltretter To: John Paul Adrian Glaubitz Cc: Thomas Gleixner , Marc Zyngier , Radu Rendec , Artur Rojek , Rich Felker , linux-sh@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] irqchip/jcore-aic: Fix lost IPIs on SMP Message-ID: References: <20260928035408.25871-1-kmehltretter@gmail.com> <92e110eef6dac0c6ddceb6ddda1658aeeaf1f0ec.camel@physik.fu-berlin.de> Precedence: bulk X-Mailing-List: linux-sh@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <92e110eef6dac0c6ddceb6ddda1658aeeaf1f0ec.camel@physik.fu-berlin.de> On Mon, Sep 28, 2026 at 07:57:27AM +0100, John Paul Adrian Glaubitz wrote: > Can you tell me what toolchain you used to build the kernel for J2? > > Last time I tried to use the one provided by Rob Landley, the build > failed due to an internal compiler error so I couldn't actually build > a kernel to test it on my J2 Turtleboard. > Hi Adrian, musl.cc's sh2eb-linux-muslfdpic toolchain (GCC 11.2.1, binutils 2.37): https://musl.cc/sh2eb-linux-muslfdpic-cross.tgz Your ICE is probably the one in kernel/nstree.c. Since listns() went in (v6.19), every GCC I tried ICEs there with j2_defconfig. The 64-bit put_user() asm prints %T (address + 4) of an "m" operand, and GCC can pick an indexed address that cannot be offset. The asm needs "o". GCC should still error out instead of crashing, so I filed a GCC bug too: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=127639 Fix below, formal patch follows. With it, j2_defconfig with SMP=y builds fine with the musl.cc toolchain. Would be great if you could test on your Turtleboard! Karl -- >8 -- diff --git a/arch/sh/include/asm/uaccess_32.h b/arch/sh/include/asm/uaccess_32.h index 5d7ddc092afd7..879d262489219 100644 --- a/arch/sh/include/asm/uaccess_32.h +++ b/arch/sh/include/asm/uaccess_32.h @@ -92,7 +92,7 @@ __asm__ __volatile__( \ ".long 1b + 2, 3b\n\t" \ ".previous" \ :"=&r" (err), "=&r" (x) \ - :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); }) + : "o" (__m(addr)), "i" (-EFAULT), "0" (err)); }) #else #define __get_user_u64(x, addr, err) \ ({ \ @@ -116,7 +116,7 @@ __asm__ __volatile__( \ ".long 1b + 2, 3b\n\t" \ ".previous" \ :"=&r" (err), "=&r" (x) \ - :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); }) + : "o" (__m(addr)), "i" (-EFAULT), "0" (err)); }) #endif #define __put_user_size(x,ptr,size,retval) \ @@ -196,7 +196,7 @@ __asm__ __volatile__( \ ".long 1b, 3b\n\t" \ ".previous" \ : "=r" (retval) \ - : "r" (val), "m" (__m(addr)), "i" (-EFAULT), "0" (retval) \ + : "r" (val), "o" (__m(addr)), "i" (-EFAULT), "0" (retval) \ : "memory"); }) #else #define __put_user_u64(val,addr,retval) \ @@ -218,7 +218,7 @@ __asm__ __volatile__( \ ".long 1b, 3b\n\t" \ ".previous" \ : "=r" (retval) \ - : "r" (val), "m" (__m(addr)), "i" (-EFAULT), "0" (retval) \ + : "r" (val), "o" (__m(addr)), "i" (-EFAULT), "0" (retval) \ : "memory"); }) #endif