From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A29E2372071 for ; Mon, 28 Sep 2026 18:25:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.175 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790619946; cv=none; b=aDgpQftUqAtXoQlvUn6ecRBMDc/ngwYekVg+9vq/cfKG71cklgG8Dh/2sNwLQzZvroBEcxuLgSudz/ZU0s2sgr4hk6MSDLA63URbNO41eNKmrvRxJ6PKROKQ8W6wxzqYFP46n+FwzSt00BRjS2VMDKOyaaxrf4ergFeEf06BJig= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790619946; c=relaxed/simple; bh=S6eNU2hZhNF7ss9QpaGLOW/V81g2oJ53iDZrrOnsD4U=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=JZi1Kyq0WEIOjOR+iBoqvSMo1PMP4gi3fVhWbfEXeng43S+spLxP7d7gNQrXOZ44GZaESErei1NYnXmTSwm73Rwn6xzLg1cl68DCQzd+31eRDOjqf/bZ8VnLT3+PRuEIEbIZ1z3k/ceniyCo8qEYvJfQcw8L0q56dcSZlAl0168= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=FWuHJqll; arc=none smtp.client-ip=209.85.214.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="FWuHJqll" Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-2d3b445a84fso8375ad.1 for ; Mon, 28 Sep 2026 11:25:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1790619944; x=1791224744; darn=lists.linux.dev; h=in-reply-to:content-disposition:content-type:mime-version :references:message-id:subject:cc:to:from:date:from:to:cc:subject :date:message-id:reply-to:content-type; bh=S6xtdmPyxZgVCGy2Ldjj48nQ82FMLqqca6Mq7V23FWM=; b=FWuHJqll7s41lHP1KLy8aVdi9j9Ej/cHywVyBNxb2dAvHFaFz0aTdiw04ZZYOIVL5e 1Nt7X+T8Q6TcT7jXirErqHxuo9wowX7Ux0LbHXeBp/EtqKE7WmpJxr6FRirXXMaVlWyG xb28B4T9GBvQpfmn3DkDbk5/x/yP9lYTSWZXSrwxQ0rooFR091m2+GLDoX2CnwdqSaId 75KdIOteqfWq7OmB7cRlVwToVIdW6IqHxMbMudFNvj06kLEcey0K58a/y9LFvKlmmQV/ Xyy38yj6Ijb6QMSGZdGxacLUspuuK7N4ECiG5Xinh8imVlWDHv/GqkT4ejB+3PsRsWhE 2H6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790619944; x=1791224744; h=in-reply-to:content-disposition:content-type:mime-version :references:message-id:subject:cc:to:from:date:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=S6xtdmPyxZgVCGy2Ldjj48nQ82FMLqqca6Mq7V23FWM=; b=r67+YxbQBffbJxQpyysKkqlSXBmjtRxbTgu4FncvARkRnDIUh22+MzPdcZlsPL+z0j FG10s0K9bM2HH+P4dusTj9CvxM9XzrhNSGuslmyRRxTYT5BuYHiqYLe2/gywVLf6/4/4 PqvlkO1zsN066iB4m97kNWx45RYGUrWjLKJsy+MyRakm9GLg/fcFWKjGuPogbhumjuLx PbqvPDl7LFXWWOfMJ0f4punXUyPeN2sj9nTwOpmnRbisIjWPyuFqIK0fbwGxllCl2Hc5 g1Dnk9pcb2wFBKYQ5Q0soFBTkT6qIv2ZRBZUTdvANGYHqWH9O4S/R7sJe85oZW4XF0wQ xPbA== X-Forwarded-Encrypted: i=1; AKwUvByG3WALXtza2fHQALUoof0lOYuY2w1hOVjQjNj2V0NMLOR27G0Y090VwlzHaXMnx3naqnoe9A==@lists.linux.dev X-Gm-Message-State: AFq9FYKQgZ6ik0czAJsoMKqbTlc/52X78/n2dxQurgyuQpyBKPdj5yyO OM+4SicBSqaT/00ZwgGBMAh+Ago7dYe5qLoQJbV9TXrLTVIUc5s/kJAy8682UvJO6JMzzrtMrFT MVZ/5apCVzqU= X-Gm-Gg: AYBFou3dJWFgq1hchW8yrdB9NEjEoXKm4h/hUiE8XSp5ID6EGCejclxt5B4/HOPrPK/ ZHzalZSyK0iSo+OypHiEDdz9Dln+QOBZxraq/JErE8QZX4j7fz5uP5gqnjZ6FGjeUh/PREp+5lw ZUYkMhlZenbSpBI8N1DGcCtFO8CszooYVR1Vny8k833BwpQqBXfDIiumrVSCcb5aqiB93t/NYm4 SIarvgfywCM7CgM4NShfLrbhNFcRCPQdz+e8tLMAJuLrfZCuEsAELixDZF6ZgAS+bu8DWevhIa3 TNf4enn+tNmgKOB8EnZBKL5q7WZ3bXxZgaovEbV5QgHpykDv4pmE7q6GLU51A8AYuaercFnyB2k BenY0o3dwfF9dNZT8uQ8fSbjfYdttD562KZaBGYR95rER/dnVra/BXZdcMtcmQIJljmuMXKfOAw UAYHanCYWKwHxjK06pyTTaFp7Ihae9VX6hEmStX6jBB1apvGmZTsba0Yd8OhwVyGd9t9FZDBE1v IqfvN4rmWlSLWin89671pCFUtt/DrtdA2OL X-Received: by 2002:a17:903:3a8b:b0:2cf:9ec1:ea6e with SMTP id d9443c01a7336-2e2c600c613mr28065ad.8.1790619943076; Mon, 28 Sep 2026 11:25:43 -0700 (PDT) Received: from google.com (105.211.142.34.bc.googleusercontent.com. [34.142.211.105]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a49858c123sm831538a91.3.2026.09.28.11.25.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2026 11:25:42 -0700 (PDT) Date: Mon, 28 Sep 2026 18:25:34 +0000 From: Pranjal Shrivastava To: Jason Gunthorpe Cc: Catalin Marinas , Jonathan Corbet , iommu@lists.linux.dev, "Joerg Roedel (AMD)" , Jean-Philippe Brucker , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, Mark Rutland , Randy Dunlap , Robin Murphy , Shuah Khan , Will Deacon , David Matlack , Jean-Philippe Brucker , Jonathan Cameron , Nicolin Chen , Pasha Tatashin , patches@lists.linux.dev, Samiullah Khawaja , Mostafa Saleh , stable@vger.kernel.org, Vijayanand Jitta Subject: Re: [PATCH v7 8/9] iommu/arm-smmu-v3: Change how the tlbi describes the invalidation Message-ID: References: <0-v7-e84261bbe7cd+2ea80b-smmu_tlbi_jgg@nvidia.com> <8-v7-e84261bbe7cd+2ea80b-smmu_tlbi_jgg@nvidia.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <8-v7-e84261bbe7cd+2ea80b-smmu_tlbi_jgg@nvidia.com> On Mon, Sep 21, 2026 at 08:55:16PM -0300, Jason Gunthorpe wrote: > The range-invalidation logic has long had a FIXME that there is not enough > information to properly compute the range invalidation. There is also > subtly not enough information to properly compute the single stride > either. > > Change tlbi to use the information format that iommupt is going to use for > ARM. This prepares the invalidation code to support iommupt and fixes two > small limitations with the current code. > > iommupt is designed to accumulate all invalidation into a single gather, > then the iommu driver should issue a small number of commands to execute > the gather to control invalidation latency. This is in contrast to > io-pgtable-arm.c which generates many gather flushes and direct walk cache > flushes as it progresses. > > To accommodate this the gather will accumulate "damage" in bitmaps, one > for leaf changes and one for table changes. This is enough information for > SMMUv3 to compute the proper stride for single invalidation and to > generate ideal hints for range invalidation. > > Change the inner workings of the tlbi process to directly use this > new-style gather description with the idea that the iommupt conversion > will just direct assign the gather fields to the tlbi. > > Rework the three places creating the tlbi to express their needs in > terms of the new bitmaps. > > 1) Simple iotlb invalidation always gets a single range of leaf > levels, so it can set a single leaf bit > > 2) Walk invalidation is expected to clear the table and all the leaves it > could contain. Set a single table bit and all the leaf bits. > > There is a weakness in the existing io-pgtable where it double > invalidates the leaves, once through the arm_smmu_tlb_inv_walk() then > again through the gather. Since these are separate operations they are > not capped by the invalidation count limits and a single unmap may end > up doing thousands of tlbi commands. Eventually converting to iommupt's > gather only approach will correct this. > > 3) SVA invalidation has no idea what the MM did, so it will set all > the bits in the bitmaps. > > This corrects another weakness where the range-invalidation logic > was generating hints assuming the #2 rules which isn't correct > for SVA. > > Reviewed-by: Nicolin Chen > Tested-by: Nicolin Chen > Signed-off-by: Jason Gunthorpe Reviewed-by: Pranjal Shrivastava Thanks, Praan