From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 01D18CA601E for ; Fri, 9 Oct 2026 23:50:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=635aK5aTg75af/c4AdivH/iNAFn51ca1t7NFjH8RCxc=; b=deJkNnIZ2M73t/ tOCs7Ig5tTXDj2Bt8PQ9HoJ26PXAKJujlvcjCRaDXJzTy5jk/szbHgm1T0LdxU8qdwa1Qqa7gRZbi C9SSiHDIBSXs85kWYMhVVB04eZM2dtpvTciUvpJN0h/C7qc2An8sMVn78pKGoEOJHE/giZuDXWF5s sQ3o8UF8aZvvgENQGMICbAdy+kYMZMR4abt8FDqxp+7kfORTpBw6Ae/paaMEQB5zHmPRL6WZbFVuL Re6GlItH8IujHxzzAfL3dWtux0AeNGcqTBal3OLm5TVkkdq0fjkSCMeCxVLz4P0HPou6sLU0fhgGJ GpLFLgNzWAkRWMcHPInA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xFKML-00000007LUE-0TOz; Fri, 09 Oct 2026 23:50:41 +0000 Received: from sea.source.kernel.org ([2600:3c0a:e001:78e:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1xFKMJ-00000007LU6-3NW5 for linux-mtd@lists.infradead.org; Fri, 09 Oct 2026 23:50:39 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by sea.source.kernel.org (Postfix) with ESMTP id C085B43860; Fri, 9 Oct 2026 23:50:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 454921F000FF; Fri, 9 Oct 2026 23:50:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1791589838; bh=Me0JUOg3RaYjJxkzwy+zMmAk8XgLjMtEFzGKAxAR5Do=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=FQOxSa2ZV2ef28Z3ql4MZnv+N6cXBRXZdCEzTDg3NbNTI/5shYt8GDPds6Vz6an3G X6ydoPf7oTRSyZRY2c0qBN9FwlJrNn4/53KcJmOhIwV6O4bF6Qg0PdVFiRg8vuZa2p 1Z5asoqtRXNbgjES+NSeLy/fcRdpfnhCZp9c+6QR7rA4ktq1Sgyulx5F4lzXEPdX6M 4V6Q+U+yabhSpLcwOse/99FzEPjMeQctoO0i1yFg803f7NW4D+TrgC/ZNTOEtWk6y2 Rco8ggdVT4FphrKlVKZ9NYDKncxQn0KGO7aTUW0M06DUrTHpal9W18FLHjBIY/4Mo+ 8sawh3xs9kBhA== Date: Sat, 10 Oct 2026 07:30:39 +0800 From: Jisheng Zhang To: Nuno =?utf-8?B?U8Oh?= Cc: Miquel Raynal , Nuno =?utf-8?B?U8Oh?= , Fei Xie , Mark Brown , linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org Subject: Re: [RFC PATCH 0/4] spi: cadence-xspi: add ACMD PIO support for NAND and NOR Message-ID: References: <20260928055005.3987624-1-fei.xie@horizon.auto> <87bj99lef4.fsf@bootlin.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+linux-mtd=archiver.kernel.org@lists.infradead.org T24gRnJpLCBPY3QgMDksIDIwMjYgYXQgMDc6MTc6MzVBTSArMDEwMCwgTnVubyBTw6Egd3JvdGU6 Cj4gT24gRnJpLCAyMDI2LTEwLTA5IGF0IDEyOjMwICswODAwLCBKaXNoZW5nIFpoYW5nIHdyb3Rl Ogo+ID4gT24gVGh1LCBPY3QgMDgsIDIwMjYgYXQgMDk6NTU6MjdQTSArMDgwMCwgSmlzaGVuZyBa aGFuZyB3cm90ZToKPiA+ID4gT24gV2VkLCBPY3QgMDcsIDIwMjYgYXQgMDc6MTI6NTdBTSArMDEw MCwgTnVubyBTw6Egd3JvdGU6Cj4gPiA+ID4gT24gV2VkLCAyMDI2LTEwLTA3IGF0IDEyOjQ4ICsw ODAwLCBKaXNoZW5nIFpoYW5nIHdyb3RlOgo+ID4gPiA+ID4gT24gVHVlLCBPY3QgMDYsIDIwMjYg YXQgMDc6NTA6NDRBTSArMDEwMCwgTnVubyBTw6Egd3JvdGU6Cj4gPiA+ID4gPiA+IE9uIFN1biwg MjAyNi0xMC0wNCBhdCAxNjozNyArMDIwMCwgTWlxdWVsIFJheW5hbCB3cm90ZToKPiA+ID4gPiA+ ID4gPiBIZWxsbywKPiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiBPbiAyOC8wOS8yMDI2IGF0 IDE2OjAyOjI3ICswMSwgTnVubyBTw6EgPG51bm8uc2FAYW5hbG9nLmNvbT4gd3JvdGU6Cj4gPiA+ ID4gPiA+ID4gCj4gPiA+ID4gPiA+ID4gPiBPbiBNb24sIFNlcCAyOCwgMjAyNiBhdCAwMTo1MDow NVBNICswODAwLCBGZWkgWGllIHdyb3RlOgo+ID4gPiA+ID4gPiA+ID4gCj4gPiA+ID4gPiA+ID4g PiBIaSBGZWksCj4gPiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiA+ID4gSGkgTnVubywgTWlx dWVsLAo+ID4gPiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiA+ID4gVGhhbmtzIGZvciBhc2tp bmcgZm9yIGJlbmNobWFya3MuIEkgYmFja3BvcnRlZCB0aGUgMzIvNjQtYml0IFNUSUcKPiA+ID4g PiA+ID4gPiA+ID4gU0RNQQo+ID4gPiA+ID4gPiA+ID4gPiB0cmFuc2ZlciBjaGFuZ2VzIGZyb20g dGhlIHBhdGNoIE51bm8gcG9pbnRlZCB0byBbMV0gdG8gb3VyIHZlbmRvciA2LjEKPiA+ID4gPiA+ ID4gPiA+ID4ga2VybmVsLCBhbmQgY29tcGFyZWQgdGhhdCBTVElHIHBhdGggYWdhaW5zdCB0aGUg QUNNRCBTUEkgTkFORCBwYXRoCj4gPiA+ID4gPiA+ID4gPiA+IGZyb20KPiA+ID4gPiA+ID4gPiA+ ID4gdGhpcyBSRkMuIEkgaGF2ZSBub3QgYXBwbGllZCBOdW5vJ3Mgc2VwYXJhdGUgQUNNRCByZWFk Cj4gPiA+ID4gPiA+ID4gPiA+IGltcGxlbWVudGF0aW9uOwo+ID4gPiA+ID4gPiA+ID4gPiB0aGUg ZmlndXJlcyBiZWxvdyBhcmUgZm9yIHRoZSBpbXBsZW1lbnRhdGlvbiBpbiB0aGlzIFJGQy4KPiA+ ID4gPiA+ID4gPiA+ID4gCj4gPiA+ID4gPiA+ID4gPiA+IFRoZSBkZXZpY2UgaXMgYSBHRDVGNEdN OFJFIFNQSSBOQU5EICgyIEtpQiBwYWdlcywgMTI4IEtpQgo+ID4gPiA+ID4gPiA+ID4gPiBlcmFz ZWJsb2NrcykKPiA+ID4gPiA+ID4gPiA+ID4gb24gYSBIb3Jpem9uIEo2QiBib2FyZCwgcnVubmlu ZyBhdCA4MCBNSHogaW4gcXVhZCBTRFIgbW9kZS4gQm90aAo+ID4gPiA+ID4gPiA+ID4gPiBwYXRo cwo+ID4gPiA+ID4gPiA+ID4gPiB1c2VkIHRoZSBzYW1lIGJvYXJkIFBIWSBjb25maWd1cmF0aW9u LiBTVElHIG5lZWRlZCBvbmUgYWRkaXRpb25hbAo+ID4gPiA+ID4gPiA+ID4gPiBkdW1teQo+ID4g PiA+ID4gPiA+ID4gPiBjbG9jayBmb3IgdGhlIEVCaCByZWFkLWNhY2hlIGNvbW1hbmQgb24gdGhp cyBib2FyZCB0byByZXR1cm4gY29ycmVjdAo+ID4gPiA+ID4gPiA+ID4gPiBkYXRhIGF0IDgwIE1I ei4gVGhpcyBpcyBhIGxvY2FsIHRlc3QgYWRqdXN0bWVudCwgbm90IHBhcnQgb2YgdGhlCj4gPiA+ ID4gPiA+ID4gPiA+IHBvc3RlZAo+ID4gPiA+ID4gPiA+ID4gPiBSRkMgb3IgWzFdOyBJIGV4Y2x1 ZGVkIHRoZSBpbmNvcnJlY3QgU1RJRyByZWFkcyBmcm9tIHRoZSBjb21wYXJpc29uLgo+ID4gPiA+ ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiA+ID4gSSByYW4gZmxhc2hfc3BlZWQgLWMgNSAtZCAv ZGV2L210ZDE4IHRocmVlIHRpbWVzIHdpdGggZWFjaCBtb2RlLiBUaGUKPiA+ID4gPiA+ID4gPiA+ ID4gbnVtYmVycyBiZWxvdyBhcmUgdGhlIGFyaXRobWV0aWMgbWVhbnMsIGluIEtpQi9zOgo+ID4g PiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiA+ID4gwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIFNUSUfCoMKgwqDCoMKgIEFDTUQg UElPCj4gPiA+ID4gPiA+ID4gPiA+IMKgIGVyYXNlYmxvY2sgd3JpdGUgc3BlZWTCoMKgwqDCoMKg IDM2ODXCoMKgwqDCoMKgwqDCoMKgwqAgMzU1NQo+ID4gPiA+ID4gPiA+ID4gPiDCoCBlcmFzZWJs b2NrIHJlYWQgc3BlZWTCoMKgwqDCoMKgIDEyNDY4wqDCoMKgwqDCoMKgwqDCoCAxNDIyMgo+ID4g PiA+ID4gPiA+ID4gPiDCoCBwYWdlIHdyaXRlIHNwZWVkwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCAz NjcxwqDCoMKgwqDCoMKgwqDCoMKgIDM1MTAKPiA+ID4gPiA+ID4gPiA+ID4gwqAgcGFnZSByZWFk IHNwZWVkwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCAxMTkzMcKgwqDCoMKgwqDCoMKgwqAgMTM3MTYK PiA+ID4gPiA+ID4gPiA+ID4gwqAgZXJhc2Ugc3BlZWTCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC oMKgwqAgNDAwMDDCoMKgwqDCoMKgwqDCoMKgIDM3NjQ3Cj4gPiA+ID4gPiA+ID4gPiAKPiA+ID4g PiA+ID4gPiA+IFNvIHRoaXMgZ29lcyBhbG9uZyB3aXRoIG15IGV4cGVjdGF0aW9ucy4gSSB0aGlu ayB3ZSBjYW4gYWxsIGFncmVlIHRoYXQKPiA+ID4gPiA+ID4gPiA+IFBST0dSQU0gKyBFUkFTRSBp cyBub3Qgd29ydGggdGhlIHRyb3VibGU/IFdlIGV2ZW4gbG9vc2UgcGVyZm9ybWFuY2UuLi4KPiA+ ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiBZZWFoLgo+ID4gPiA+ID4gPiA+IAo+ID4gPiA+ID4g PiA+ID4gPiBGb3IgYSBzZXBhcmF0ZSBzZXF1ZW50aWFsLXJlYWQgdGVzdCwgSSBlcmFzZWQgYW5k IHByb2dyYW1tZWQgdGhlCj4gPiA+ID4gPiA+ID4gPiA+IGZpcnN0Cj4gPiA+ID4gPiA+ID4gPiA+ IDY0IE1pQiB3aXRoIGtub3duIHJhbmRvbSBkYXRhLCB0aGVuIGNoZWNrZWQgdGhhdCBlYWNoIG1v ZGUgcmVhZCBiYWNrCj4gPiA+ID4gPiA+ID4gPiA+IHRoZSBjb21wbGV0ZSBhcmVhIGJ5dGUtZm9y LWJ5dGUuIEJvdGggU0hBLTI1NiBoYXNoZXMgbWF0Y2hlZCB0aGUKPiA+ID4gPiA+ID4gPiA+ID4g c291cmNlOwo+ID4gPiA+ID4gPiA+ID4gPiB0aGUgcmVwb3J0ZWQgRUNDIGZhaWx1cmUgY291bnRz IHdlcmUgemVyby4gSSB0aGVuIHJhbjoKPiA+ID4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiA+ID4g V2hhdCBkbyB5b3UgbWVhbiBieSBzZXF1ZW50aWFsIHJlYWQ/IERvZXMgeW91ciBmbGFzaCBzdXBw b3J0cwo+ID4gPiA+ID4gPiA+ID4gY29udGludW91cwo+ID4gPiA+ID4gPiA+ID4gcmFkcyAob3Ig YnVmZmVyZWQgbW9kZSBJIHRoaW5rKS4gSWYgc28sIEkgd291bGQgZXhwZWN0IG11Y2ggYmV0dGVy Cj4gPiA+ID4gPiA+ID4gPiBudW1iZXIgZm9yIHRoZSBBQ01EIGNhc2UuIEJ1dCB0aGF0IGNhbiBi ZSB0aGUgaXNzdWUgb2YgaGF2aW5nIGJvdGggdGhlCj4gPiA+ID4gPiA+ID4gPiBjb250cm9sbGVy IGFuZCB0aGUgY2hpcCB0cnlpbmcgdG8gd2FsayBwYWdlcy4KPiA+ID4gPiA+ID4gPiAKPiA+ID4g PiA+ID4gPiBTZXF1ZW50aWFsLCBjb250aW51b3VzIGFuZCBidWZmZXJlZCBzaG91bGQgbWVhbiB0 aGUgc2FtZSBpbiB0aGUgTkFORAo+ID4gPiA+ID4gPiA+IGNvbnRleHQuCj4gPiA+ID4gPiA+ID4g Cj4gPiA+ID4gPiA+ID4gPiA+IMKgIC92YXIvYnVzeWJveC90aW1lIC1mICdyZWFsPSVlIHVzZXI9 JVUgc3lzPSVTIGNwdT0lUCcgXAo+ID4gPiA+ID4gPiA+ID4gPiDCoMKgwqAgZGQgaWY9L2Rldi9t dGQxOCBvZj0vZGV2L251bGwgYnM9MU0gY291bnQ9NjQKPiA+ID4gPiA+ID4gPiA+ID4gCj4gPiA+ ID4gPiA+ID4gPiA+IMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgIFNUSUfCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBBQ01EIFBJTwo+ID4gPiA+ID4g PiA+ID4gPiDCoCBlbGFwc2VkICh0aHJlZSBydW5zKcKgwqDCoCA1LjMwLzUuMjgvNS4yNiBzwqAg NC42Ni80LjY1LzQuNjUgcwo+ID4gPiA+ID4gPiA+ID4gPiDCoCBtZWFuIHRocm91Z2hwdXTCoMKg wqDCoMKgwqDCoMKgIDEyLjEyIE1pQi9zwqDCoMKgwqDCoMKgIDEzLjc1IE1pQi9zCj4gPiA+ID4g PiA+ID4gPiA+IMKgIG1lYW4gc3lzdGVtIHRpbWXCoMKgwqDCoMKgwqDCoCAzLjU1IHPCoMKgwqDC oMKgwqDCoMKgwqDCoMKgIDEuMDYgcwo+ID4gPiA+ID4gPiA+ID4gPiDCoCBwcm9jZXNzIENQVSB1 c2FnZcKgwqDCoMKgwqDCoCA2NyXCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgIDIyJQo+ID4g PiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiA+ID4gT24gdGhpcyBOQU5ELCBBQ01EIGltcHJv dmVzIHRoZSA2NCBNaUIgcmVhZCB0aHJvdWdocHV0IGJ5IGFib3V0IDEzLjUlCj4gPiA+ID4gPiA+ ID4gPiA+IGFuZCByZWR1Y2VzIHRoZSByZWFkaW5nIHByb2Nlc3MncyBDUFUgdXNhZ2UgYnkgNDUg cGVyY2VudGFnZSBwb2ludHMuCj4gPiA+ID4gPiA+ID4gPiA+IFRoZSBmbGFzaF9zcGVlZCByZXN1 bHRzIHNob3cgYSBzaW1pbGFyIGdhaW4gZm9yIHJlYWRzLCBpbmNsdWRpbmcKPiA+ID4gPiA+ID4g PiA+ID4gc2luZ2xlLXBhZ2UgcmVhZHMuCj4gPiA+ID4gPiA+ID4gCj4gPiA+ID4gPiA+ID4gRllJ LCBpZiB5b3UgcHVsbCBhIHJlY2VudCB2ZXJzaW9uIG9mIG10ZC11dGlscywgZmxhc2hfc3BlZWQg Y2FuCj4gPiA+ID4gPiA+ID4gYmVuY2htYXJrIGNvbnRpbnVvdXMgcmVhZCBpbXByb3ZlbWVudHMg d2l0aCB0aGUgLUMgb3B0aW9uLgo+ID4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiA+ID4gPiBJIGRv IG5vdCBzZWUgYSBwcm9ncmFtIG9yIGVyYXNlIHRocm91Z2hwdXQgYmVuZWZpdDoKPiA+ID4gPiA+ ID4gPiA+ID4gQUNNRCBpcyBzbGlnaHRseSBzbG93ZXIgZm9yIGJvdGggaW4gdGhpcyBzZXR1cC4g VGhlc2UgYXJlIFNQSSBOQU5ECj4gPiA+ID4gPiA+ID4gPiA+IHJlc3VsdHMgb25seTsgSSBoYXZl IG5vdCBiZW5jaG1hcmtlZCB0aGUgTk9SIHBhdGggb24gdGhpcyBib2FyZC4KPiA+ID4gPiA+ID4g PiA+IAo+ID4gPiA+ID4gPiA+ID4gU28gQ1BVIHJlc3VsdHMgYXJlIHRoZSBiaW5nIHRoaW5nIGhl cmUuIEkgZ3Vlc3Mgd2UgbmVlZCB0byBkZWNpZGUgaWYKPiA+ID4gPiA+ID4gPiA+IGl0J3Mgd29y dGggdGhlIGFtb3VudCBvZiBjb21wbGV4aXR5IGl0IHJlcXVpcmVzIGZvciB0aGUgd2hvbGUgdGhp bmcgdG8KPiA+ID4gPiA+ID4gPiA+IHdvcmsuIEFzIEkgbWVudGlvbmVkLCBpZiB0aGUgY2hpcCBo YXMgY29udGludW91cyBtb2RlIGFuZCB3ZSB0cnkgdG8KPiA+ID4gPiA+ID4gPiA+IHJlYWQgYW55 dGhpbmcgYmlnZ2VyIHRoYW4gcGFnZSBzaXplIHdlIHNob3VsZCBsZXQgdGhlIG5hbmQgY2hpcCB0 bwo+ID4gPiA+ID4gPiA+ID4gd2FsayB0aGUgcGFnZXMgYW5kIHRoYXQgbWVhbnMgdGhlIGJlaGF2 aW9yIHdlIGhhdmUgdG9kYXkgKElNSE8gb2YKPiA+ID4gPiA+ID4gPiA+IGNvdXJzZSk6Cj4gPiA+ ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiA+IDB4MTMgKFNUSUcpICsgd2FpdCArIHJlYWQgZnJv bSBjYWNoZSAoQUNNRCkKPiA+ID4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiA+ID4gSWYgd2UncmUg b25seSByZWFkaW5nIGEgc2luZ2xlIHBhZ2UgdGhlbiB0aGUgbG9naWMgaW4gdGhpcyBzZXJpZXMg d291bGQKPiA+ID4gPiA+ID4gPiA+IHBheW9mZiAoc2xpZ2h0IHBlcmZvcm1hbmNlIGdhaW4gKyBz aWduaWZpY2FudCBkcm9wIGluIGNwdSBsb2FkKS4gT25lCj4gPiA+ID4gPiA+ID4gPiBzaW1wbGUK PiA+ID4gPiA+ID4gPiA+IHdheSBmb3IgZG9pbmcgdGhpcyBhcyBhIHN0YXJ0aW5nIHBvaW50IHdv dWxkIGJlOgo+ID4gPiA+ID4gPiA+ID4gCj4gPiA+ID4gPiA+ID4gPiAqIE5hbmQgaGFzIGNvbnQg bW9kZSAtPiB4c3BpIGNvbnRyb2xsZXIgZG9lcyBub3RoaW5nIHNwZWNpYWwKPiA+ID4gPiA+ID4g PiA+ICogTmFuZCBoYXMgbm8gY29udCBtb2RlIC0+IEFnZ3JlZ2F0ZSB0aGUgeGZlcnMgdG9nZXRo ZXIuCj4gPiA+ID4gPiA+ID4gCj4gPiA+ID4gPiA+ID4gSSdtIGZpbmUgd2l0aCBzdGF0aWMgZGVj aXNpb25zIGxpa2UgdGhhdCwgYnV0IG15IHVuZGVyc3RhbmRpbmcgb2YgdGhlCj4gPiA+ID4gPiA+ ID4gYWJvdmUgaXMgdGhhdCBBQ01EIG1vZGUgaXMgdXNlZnVsIGZvciBhbGwgcmVhZHMuIHNvIEkg ZG9uJ3QgZ2V0IHdoeSB5b3UKPiA+ID4gPiA+ID4gPiB3b3VsZCBubyB1c2UgaXQgZm9yIGFsbC4g TWF5YmUgYmVjYXVzZSBpdCB3b3VsZCBicmVhayBjb250aW51b3VzIHJlYWRzPwo+ID4gPiA+ID4g PiA+IChzb3JyeSBJIGxvc3QgYSBiaXQgb2YgdGhlIGNvbnRleHQgYWxyZWFkeSkuCj4gPiA+ID4g PiA+IAo+ID4gPiA+ID4gPiBFeGFjdGx5LiBJbiBBQ01ELCBpcyBhbHNvIGNhcGFibGUgb2YgIndh bGtpbmcgcGFnZXMiIGZvciByZWFkcyBiaWdnZXIgdGhhbgo+ID4gPiA+ID4gPiBwYWdlCj4gPiA+ ID4gPiA+IHNpemUKPiA+ID4gPiA+ID4gKGhlbmNlIHRoZSBuZWVkIHRvIGtub3cgdGhlIGZsYXNo IGdlb21ldHJ5KSBhbmQgSUlSQywgdGhhdCBkb2VzIG5vdCByZWFsbHkKPiA+ID4gPiA+ID4gd29y awo+ID4gPiA+ID4gPiB3ZWxsCj4gPiA+ID4gPiA+IHdoZW4gdGhlIGZsYXNoIGlzIGFsc28gZG9p bmcgaXQuCj4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiA+IEZvciB3cml0 ZXMgYW5kIGVyYXNlcyBob3dldmVyLCBpdCBzZWVtcyBsaWtlIHdlIGNvdWxkIGtlZXAgdGhlIFNU SUcgcGF0aC4KPiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gPiA+IERvaW5nIHNvbWV0aGluZyBk eW5hbWljIHdvdWxkIGJlIG11Y2ggbW9yZSBjb21wbGV4IEkgZ3Vlc3MuIFdpdGggdGhlCj4gPiA+ ID4gPiA+ID4gPiBhYm92ZSByZWFzb25pbmcsIGhhdmluZyBzb21lIG1lbV9pbmZvKCkga2luZCBv ZiBzcGlfbWVtIGNhbGxiYWNrIHRvCj4gPiA+ID4gPiA+ID4gPiB0ZWxsCj4gPiA+ID4gPiA+ID4g PiB1cyB0aGluZ3MgbGlrZSBnZW9tZXRyeSwgY29udGludW91cyBtb2RlIHN1cHBvcnQsIGV0YyB3 b3VsZCBiZSBlbm91Z2gKPiA+ID4gPiA+ID4gPiA+IHRvCj4gPiA+ID4gPiA+ID4gPiBoYW5kbGUg dGhlIGFib3ZlIEkgdGhpbmsuIFRoZSByZWFzb25pbmcgaXMgdGhhdCByZWFkaW5nIGEgbmFuZCBw YWdlIGlzCj4gPiA+ID4gPiA+ID4gPiBhbHdheXMgbGlrZSBzcGluYW5kX2xvYWRfcGFnZV9vcCgp IChvcGNvZGUgMHgxMykgKyBzcGluYW5kX3dhaXQoKSArCj4gPiA+ID4gPiA+ID4gPiBzcGluYW5k X3JlYWRfZnJvbV9jYWNoZV9vcCgpIHNvIHdlIGNvdWxkIHByb2JhYmx5IGFnZ3JlZ2F0ZSBldmVy eXRoaW5nCj4gPiA+ID4gPiA+ID4gPiBpbiB0aGUgbGFzdCBjYWxsIG9uIHRoZSBjb250cm9sbGVy IHNpZGUgd2l0aG91dCBjb21wbGljYXRpbmcgdGhlIG5hbmQKPiA+ID4gPiA+ID4gPiA+IGNvcmUK PiA+ID4gPiA+ID4gPiA+IGxvZ2ljLgo+ID4gPiA+ID4gPiA+IAo+ID4gPiA+ID4gPiA+IEluIGdl bmVyYWwsIGRyaXZlcnMgbWFraW5nIGFzc3VtcHRpb25zIGhhcyBiZWVuIGEgZGlzYXN0ZXIgaW4g dGhlIHJhdwo+ID4gPiA+ID4gPiA+IE5BTkQgd29ybGQuIFRoaXMgd2FzIHRoZSBtYWluIHJlYXNv biBmb3IgdGhlIC0+ZXhlY19vcCgpIGludHJvZHVjdGlvbgo+ID4gPiA+ID4gPiA+IHRoZXJlOiBn aXZpbmcgdGhlIHdob2xlIG9wZXJhdGlvbiB0byB0aGUgY29udHJvbGxlciBzbyBpdCBjYW4gZGVj aWRlCj4gPiA+ID4gPiA+ID4gd2hhdCB0byBkbyB3aXRob3V0IGd1ZXNzaW5nLiBCdXQgd2UgdGhp bmtpbmcgYXQgdGhlIG9wZXJhdGlvbiBib3VuZGFyeSwKPiA+ID4gPiA+ID4gPiBub3QgYXQgdGhl ICJzZXQgb2Ygb3BlcmF0aW9ucyIgbGV2ZWwuIFNpbmNlIC0+ZXhlY19vcCgpIGluIHRoZSBTUEkg TkFORAo+ID4gPiA+ID4gPiA+IHN1YnN5c3RlbSBoYXMgYmVlbiB3cml0dGVuIGZvbGxvd2luZyB0 aGUgc2FtZSBwaGlsb3NvcGh5LCBJIGZlYXIgd2UncmUKPiA+ID4gPiA+ID4gPiBnb2luZyB0byB0 cnkgbWFrZSByb3VuZHMgZml0IGluc2lkZSBzcXVhcmVzLiBPbmUgb2YgdGhlIHBvc3NpYmxlCj4g PiA+ID4gPiA+IAo+ID4gPiA+ID4gPiBGYWlyIGVub3VnaCEgQWdyZWVkCj4gPiA+ID4gPiA+IAo+ ID4gPiA+ID4gPiA+IGFwcHJvYWNoIHdvdWxkIGJlIHRvIG1pbWljIHdoYXQgd2UndmUgZG9uZSBm b3IgdGhlIHNvbWUgbGltaXRlZAo+ID4gPiA+ID4gPiA+IGNvbnRyb2xsZXJzOiBwYWNrIGV2ZXJ5 dGhpbmcgaW4gb25lIHNpbmdsZSBvcCAoc2VlIHRoZSBfbW9ub2xpdGhpYwo+ID4gPiA+ID4gPiA+ IHN1ZmZpeCBpbiBkcml2ZXJzL210ZC9uYW5kL3Jhdy8pLiBUaGF0J3MganVzdCBvbmUgaWRlYS4K PiA+ID4gPiA+ID4gPiAKPiA+ID4gPiA+ID4gCj4gPiA+ID4gPiA+IEkgY2FuIHRha2UgYSBsb29r IG1vc3RseSBmb3IgY3VyaW9zaXR5IGFzIG15IGludGVudGlvbiBpcyBub3QgdG8gInN0ZWFsIgo+ ID4gPiA+ID4gPiB0aGlzCj4gPiA+ID4gPiA+IHdvcmsKPiA+ID4gPiA+ID4gZnJvbSBGZWkuIElm IGV2ZXJ5b25lIGFncmVlcyAoc3BlY2lhbGx5IEZlaSksIHdoYXQgSSBjYW4gZG8gaXMgdG8gc2Vu ZCBteQo+ID4gPiA+ID4gPiBzaW1wbGVyCj4gPiA+ID4gPiA+IHBhdGNoZXMgdGhhdCBqdXN0IHN1 cHBvcnQgQUNNRCAod2l0aG91dCBhbnkgc3BlY2lhbCBkaXN0aW5jdGlvbiBiZXR3ZWVuCj4gPiA+ ID4gPiA+IE5hbmQgYW5kCj4gPiA+ID4gPiA+IE5vcikKPiA+ID4gPiA+ID4gRm9yIE5hbmRzLCBJ IGhhdmUgYSBtaXggb2YgU1RJRyBhbmQgQUNNRCwgd2hlcmUgYmlnIGdhaW5zIGNvbWUgZnJvbSBO YW5kcwo+ID4gPiA+ID4gPiB3aXRoCj4gPiA+ID4gPiA+IGNvbnQKPiA+ID4gPiA+ID4gbW9kZS4K PiA+ID4gPiA+ID4gCj4gPiA+ID4gPiA+IFRoZW4gd2UgY2FuIGJ1aWxkIG9uIHRvcCBvZiBpdCBp biBvcmRlciB0byBpbXByb3ZlIE5hbmQgc3VwcG9ydCAobW9zdGx5IG9uCj4gPiA+ID4gPiA+IENQ VQo+ID4gPiA+ID4gPiBsb2FkKS4KPiA+ID4gPiA+IAo+ID4gPiA+ID4gSSdtIGFsc28gaW50ZXJl c3RlZCBpbiB0aGlzIGRyaXZlcidzIHBlcmZvcm1hbmNlLiBBIGJpdCBvZmYgdGhlIHN1YmplY3QK PiA+ID4gPiA+IGJ1dCByZWxhdGVkIHF1ZXN0aW9uOiBVc3VhbGx5LCB0aGUgU29jIG1heSBjb25u ZWN0IHRoZSB4c3BpIHRvIGRtYQo+ID4gPiA+ID4gZW5naW5lLCBJJ20gY3VyaW91cyB3aGF0IHdv dWxkIGJlIHRoZSBiZW5lZml0IG9mIGFkZGluZyBkbWEgZW5naW5lCj4gPiA+ID4gPiBzdXBwb3J0 IGluc3RlYWQgb2YgQUNNRD8gSXMgZG1hIGVuZ2luZSBzdXBwb3J0IHNpbXBsZXIgYW5kCj4gPiA+ ID4gPiBpcyB0aGUgZ2FpbihwZXJmb3JtYW5jZSArIGNwdSBsb2FkKSBtb3JlPwo+ID4gPiA+ID4g Cj4gPiA+ID4gCj4gPiA+ID4gSSdtIG5vdCBmYW1pbGlhciB3aXRoIHRoYXQgYXBwcm9hY2ggdGJo LiBCdXQgSSB3b3VsZCBhc3N1bWUgcGVyZm9ybWFuY2UgdG8gYmUKPiA+ID4gPiBwcmV0dHkKPiA+ ID4gPiBtdWNoIHNpbWlsYXIgdG8gd2hhdCBJIGhhdmUgZ2l2ZW4gdGhhdCBBQ01EIHVzZXMgdGhl IElQIGludGVybmFsIERNQSBlbmdpbmUuCj4gPiA+ID4gQnV0IG5vdAo+ID4gPiA+IHVzaW5nIEFD TUQgbWVhbnMgbm90IGhhdmluZyB0aGUgY3B1IGdhaW5zIGF0IGxlYXN0IGZvciB0aGUgc21hbGxl ciB0cmFuc2ZlcnMgYXMKPiA+ID4gPiB3ZQo+ID4gPiA+IHdvdWxkIG5vdCBiZSBhYmxlIHRvIGFn Z3JlZ2F0ZSB0cmFuc2ZlcnMuIEZXSVcsIGdpdmVuIHRoYXQgeW91IG1pZ2h0IG5vdCBoYXZlCj4g PiA+ID4gbG9va2VkCj4gPiA+IAo+ID4gPiBIbW0sIG15IHBsYXRmb3JtcyBjb25uZWN0IHR3byBk bWFlbmdpbmUgY2hhbm5lbHMgdG8gdGhlIHhzcGkgY29udHJvbGxlciwKPiA+ID4gYnV0IEkgaGF2 ZW4ndCBhZGRlZCB0aGUgZG1hLWVuZ2luZSBzdXBwb3J0IHRvIHRoZSBkcml2ZXIgeWV0LiBJZiB0 aGUKPiA+ID4gQUNNRCBpcyBlbm91Z2gsIHdoeSBIVyBjb25uZWN0cyBkbWEtZW5naW5lIHRoZW4/ IEp1c3QgY3VyaW91cywgdGhlcmUKPiA+ID4gbXVzdCBiZSBwZXJmb3JtYW5jZSBnYWluIEkgZ3Vl c3MuIEJ1dCBJJ20gbm90IHN1cmUgYW5kIEkgZG9uJ3QgaGF2ZQo+ID4gPiBwZXJmb3JtYW5jZSBu dW1iZXJzLgo+ID4gCj4gCj4gU08gdGhlIElQIGhhcyBhbiBpbnRlcm5hbCBETUEgZW5naW5lIGNh cGFibGUgb2YgYWN0aW5nIGFzIGNvbnRyb2xsZXIgYW5kIGRyaXZpbmcgdGhlCj4gYnVzIEFGQUlV LiBTbyB3ZSBkbyBub3QgcmVhbGx5IG5lZWQgYW55IGV4dGVybmFsIGRtYV9jaGFuLiBKdXN0IG5l ZWQgdG8gdXNlIHRoZSBkbWEKPiBtYXBwaW5nIEFQSSwKPiAKPiA+IEFoYSwgbXkgcGxhdGZvcm1z IGRvbid0IGVuYWJsZSB0aGUgQUNNRCBzdXBwb3J0LCBpbnN0ZWFkLCBjb25uZWN0IHRoZQo+ID4g eHNwaSB3aXRoIGRtYWMuCj4gPiAKPiA+IFNvIHdoZW4gdXBzdHJlYW1pbmcgQUNNRCBzdXBwb3J0 LCB0aGUgZHJpdmVyIG5lZWRzIHRvIGRldGVjdCB0aGUgQUNNRAo+ID4gc3VwcG9ydCBlaXRoZXIg ZHluYW1pY2FsbHkgb3IgdmlhLiBEVC4gVW5mb3J0dW5hdGVseSwgSSBkaWRuJ3QgZmluZAo+ID4g YW55IHJlZ2lzdGVyIGNhbiBleHBvcnQgdGhlIEFDTUQgYXZhaWxhYmlsaXR5LiBEVCBpcyB0aGUg b25seSB3YXk/Cj4gPiBPciBpc3N1ZSBhIHNpbXBsZSBBQ01EIGFuZCBjaGVjayBTRE1BIGVycm9y Pwo+IAo+IEknbSByZWFsbHkgbm90IHN1cmUgb24geW91ciB1c2VjYXNlLiBBQ01EIHN0YXJ0cyB0 byBwYXlvZmYgcmVhbGx5IHdoZW4gdGhlIHRyYW5zZmVycwo+IHN0YXJ0IHRvIGJlIGJpZyBlbm91 Z2guIEZvciBleGFtcGxlIGZvciBteSB1c2VjYXNlLCBJbSBvbmx5IHVzaW5nIEFDTUQgZm9yIHJl YWRzCj4gYmlnZ2VyIHRoYW4gPiAyS2lCLiBUaGF0IG51bWJlciBpcyBmaXhlZCBidXQgSSBzdXNw ZWN0IGl0J3Mgbm90IHRoYXQgc2ltcGxlIGdpdmVuCj4gdGhhdCBJdCBtaWdodCBkZXBlbmQgb24g bnVtYmVyIG9mIGxhbmVzIGFuZCBjbG9jayBzcGVlZHMuCj4gCj4gSWYgSSdtIG5vdCBtaXNzaW5n IGFueXRoaW5nLCB0aGUgZWFzaWVzdCB3YXkgdG8gaGFuZGxlIHRoaW5ncyB3b3VsZCBiZSB0byBk ZXRlY3QKPiBkbWFfY2hhbiBmcm9tIERUIGFuZCBpZiBhdmFpbGFibGUgdXNlIGl0IGluc3RlYWQg b2YgQUNNRC4KClRoZSBBQ01EIG5lZWRzIGFuIGV4dGVybmFsIFNSQU0sIGRtYWMgbmVlZHMgYW4g ZXh0ZXJuYWwgZG1hYyBjb250cm9sbGVyLgpTbyBCZWxvdyBjYXNlIGlzIGFsc28gdmFsaWQ6IG5v IGRtYWMsaWUgbm8gZG1hLWNoYW4gZnJvbSBEVCwgYW5kIG5vIEFDTUQKc3VwcG9ydCBlaXRoZXIu IEVzcGVjaWFsbHksIGxvd2VuZCBTb0NzIHdvdWxkIGNob29zZSB0aGlzIGNvbWJpbmF0aW9uLgoK SXQgc2VlbXMgc29tZXRoaW5nIGxpa2UgImNkbnMsYWNtZCIgYm9vbCBwcm9wZXJ0eSBpcyBleHBl Y3RlZCwgYnV0CndlIG5lZWQgdG8gYXNrIGZvciBEVCBtYWludGFpbmVyJ3Mgc3VnZ2VzdGlvbi4K QnV0IGlmIGlzc3Vpbmcgc2ltcGxlLCBuby1zaWRlLWVmZmVjdCBBQ01EIHRoZW4gY2hlY2sgU0RN QSBlcnJvcgpkdXJpbmcgcHJvYmUgYWxzbyB3b3JrcywgdGhlbiBpdCdzIGJldHRlciB0aGFuIERU IHByb3BlcnR5IElNSE8uCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX18KTGludXggTVREIGRpc2N1c3Npb24gbWFpbGluZyBsaXN0Cmh0dHA6Ly9s aXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtbXRkLwo= From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1BACD3C819C for ; Fri, 9 Oct 2026 23:50:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791589840; cv=none; b=eLfLq1A6xcMUwpKRCzHW7QRkEJPZt6D4g5RmESdusM3D/9RCH/B5+6NGQsEfVPQhB2KksqBn+bM3MQkRUQcgKwpBPas8tC3FyRYf0z61bl6wtDtmA3iG999Ud29rBQaMRStE5VEemEVL4jZ4veX1LiLJ25lZkv9O3H+cwV0TaMk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791589840; c=relaxed/simple; bh=MBDb9FJxmXYc9gCgql1uBFGlmTziTvBbgnDYufekNmQ=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=TezcYNG7IOENkOzhjP/huSvdXTrQf4Vic/qjhTPSGZJiDOwF9zvVE/nsBqhVxFZyCPpL+Vh/EcOMe++Et1XzwvoXSc3+mpEJUIGSqHM4vafzlwjIg2eJ3/sivRdf/RCELTolGouOvaJk3f5NFsDa+xVp3xI5+RJqC1HCZZPse0Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FQOxSa2Z; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FQOxSa2Z" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 454921F000FF; Fri, 9 Oct 2026 23:50:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1791589838; bh=Me0JUOg3RaYjJxkzwy+zMmAk8XgLjMtEFzGKAxAR5Do=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=FQOxSa2ZV2ef28Z3ql4MZnv+N6cXBRXZdCEzTDg3NbNTI/5shYt8GDPds6Vz6an3G X6ydoPf7oTRSyZRY2c0qBN9FwlJrNn4/53KcJmOhIwV6O4bF6Qg0PdVFiRg8vuZa2p 1Z5asoqtRXNbgjES+NSeLy/fcRdpfnhCZp9c+6QR7rA4ktq1Sgyulx5F4lzXEPdX6M 4V6Q+U+yabhSpLcwOse/99FzEPjMeQctoO0i1yFg803f7NW4D+TrgC/ZNTOEtWk6y2 Rco8ggdVT4FphrKlVKZ9NYDKncxQn0KGO7aTUW0M06DUrTHpal9W18FLHjBIY/4Mo+ 8sawh3xs9kBhA== Date: Sat, 10 Oct 2026 07:30:39 +0800 From: Jisheng Zhang To: Nuno =?utf-8?B?U8Oh?= Cc: Miquel Raynal , Nuno =?utf-8?B?U8Oh?= , Fei Xie , Mark Brown , linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org Subject: Re: [RFC PATCH 0/4] spi: cadence-xspi: add ACMD PIO support for NAND and NOR Message-ID: References: <20260928055005.3987624-1-fei.xie@horizon.auto> <87bj99lef4.fsf@bootlin.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Fri, Oct 09, 2026 at 07:17:35AM +0100, Nuno Sá wrote: > On Fri, 2026-10-09 at 12:30 +0800, Jisheng Zhang wrote: > > On Thu, Oct 08, 2026 at 09:55:27PM +0800, Jisheng Zhang wrote: > > > On Wed, Oct 07, 2026 at 07:12:57AM +0100, Nuno Sá wrote: > > > > On Wed, 2026-10-07 at 12:48 +0800, Jisheng Zhang wrote: > > > > > On Tue, Oct 06, 2026 at 07:50:44AM +0100, Nuno Sá wrote: > > > > > > On Sun, 2026-10-04 at 16:37 +0200, Miquel Raynal wrote: > > > > > > > Hello, > > > > > > > > > > > > > > On 28/09/2026 at 16:02:27 +01, Nuno Sá wrote: > > > > > > > > > > > > > > > On Mon, Sep 28, 2026 at 01:50:05PM +0800, Fei Xie wrote: > > > > > > > > > > > > > > > > Hi Fei, > > > > > > > > > > > > > > > > > Hi Nuno, Miquel, > > > > > > > > > > > > > > > > > > Thanks for asking for benchmarks. I backported the 32/64-bit STIG > > > > > > > > > SDMA > > > > > > > > > transfer changes from the patch Nuno pointed to [1] to our vendor 6.1 > > > > > > > > > kernel, and compared that STIG path against the ACMD SPI NAND path > > > > > > > > > from > > > > > > > > > this RFC. I have not applied Nuno's separate ACMD read > > > > > > > > > implementation; > > > > > > > > > the figures below are for the implementation in this RFC. > > > > > > > > > > > > > > > > > > The device is a GD5F4GM8RE SPI NAND (2 KiB pages, 128 KiB > > > > > > > > > eraseblocks) > > > > > > > > > on a Horizon J6B board, running at 80 MHz in quad SDR mode. Both > > > > > > > > > paths > > > > > > > > > used the same board PHY configuration. STIG needed one additional > > > > > > > > > dummy > > > > > > > > > clock for the EBh read-cache command on this board to return correct > > > > > > > > > data at 80 MHz. This is a local test adjustment, not part of the > > > > > > > > > posted > > > > > > > > > RFC or [1]; I excluded the incorrect STIG reads from the comparison. > > > > > > > > > > > > > > > > > > I ran flash_speed -c 5 -d /dev/mtd18 three times with each mode. The > > > > > > > > > numbers below are the arithmetic means, in KiB/s: > > > > > > > > > > > > > > > > > >                                STIG      ACMD PIO > > > > > > > > >   eraseblock write speed      3685          3555 > > > > > > > > >   eraseblock read speed      12468         14222 > > > > > > > > >   page write speed            3671          3510 > > > > > > > > >   page read speed            11931         13716 > > > > > > > > >   erase speed                40000         37647 > > > > > > > > > > > > > > > > So this goes along with my expectations. I think we can all agree that > > > > > > > > PROGRAM + ERASE is not worth the trouble? We even loose performance... > > > > > > > > > > > > > > Yeah. > > > > > > > > > > > > > > > > For a separate sequential-read test, I erased and programmed the > > > > > > > > > first > > > > > > > > > 64 MiB with known random data, then checked that each mode read back > > > > > > > > > the complete area byte-for-byte. Both SHA-256 hashes matched the > > > > > > > > > source; > > > > > > > > > the reported ECC failure counts were zero. I then ran: > > > > > > > > > > > > > > > > What do you mean by sequential read? Does your flash supports > > > > > > > > continuous > > > > > > > > rads (or buffered mode I think). If so, I would expect much better > > > > > > > > number for the ACMD case. But that can be the issue of having both the > > > > > > > > controller and the chip trying to walk pages. > > > > > > > > > > > > > > Sequential, continuous and buffered should mean the same in the NAND > > > > > > > context. > > > > > > > > > > > > > > > >   /var/busybox/time -f 'real=%e user=%U sys=%S cpu=%P' \ > > > > > > > > >     dd if=/dev/mtd18 of=/dev/null bs=1M count=64 > > > > > > > > > > > > > > > > > >                           STIG              ACMD PIO > > > > > > > > >   elapsed (three runs)    5.30/5.28/5.26 s  4.66/4.65/4.65 s > > > > > > > > >   mean throughput         12.12 MiB/s       13.75 MiB/s > > > > > > > > >   mean system time        3.55 s            1.06 s > > > > > > > > >   process CPU usage       67%               22% > > > > > > > > > > > > > > > > > > On this NAND, ACMD improves the 64 MiB read throughput by about 13.5% > > > > > > > > > and reduces the reading process's CPU usage by 45 percentage points. > > > > > > > > > The flash_speed results show a similar gain for reads, including > > > > > > > > > single-page reads. > > > > > > > > > > > > > > FYI, if you pull a recent version of mtd-utils, flash_speed can > > > > > > > benchmark continuous read improvements with the -C option. > > > > > > > > > > > > > > > > I do not see a program or erase throughput benefit: > > > > > > > > > ACMD is slightly slower for both in this setup. These are SPI NAND > > > > > > > > > results only; I have not benchmarked the NOR path on this board. > > > > > > > > > > > > > > > > So CPU results are the bing thing here. I guess we need to decide if > > > > > > > > it's worth the amount of complexity it requires for the whole thing to > > > > > > > > work. As I mentioned, if the chip has continuous mode and we try to > > > > > > > > read anything bigger than page size we should let the nand chip to > > > > > > > > walk the pages and that means the behavior we have today (IMHO of > > > > > > > > course): > > > > > > > > > > > > > > > > 0x13 (STIG) + wait + read from cache (ACMD) > > > > > > > > > > > > > > > > If we're only reading a single page then the logic in this series would > > > > > > > > payoff (slight performance gain + significant drop in cpu load). One > > > > > > > > simple > > > > > > > > way for doing this as a starting point would be: > > > > > > > > > > > > > > > > * Nand has cont mode -> xspi controller does nothing special > > > > > > > > * Nand has no cont mode -> Aggregate the xfers together. > > > > > > > > > > > > > > I'm fine with static decisions like that, but my understanding of the > > > > > > > above is that ACMD mode is useful for all reads. so I don't get why you > > > > > > > would no use it for all. Maybe because it would break continuous reads? > > > > > > > (sorry I lost a bit of the context already). > > > > > > > > > > > > Exactly. In ACMD, is also capable of "walking pages" for reads bigger than > > > > > > page > > > > > > size > > > > > > (hence the need to know the flash geometry) and IIRC, that does not really > > > > > > work > > > > > > well > > > > > > when the flash is also doing it. > > > > > > > > > > > > > > > > > > > > For writes and erases however, it seems like we could keep the STIG path. > > > > > > > > > > > > > > > Doing something dynamic would be much more complex I guess. With the > > > > > > > > above reasoning, having some mem_info() kind of spi_mem callback to > > > > > > > > tell > > > > > > > > us things like geometry, continuous mode support, etc would be enough > > > > > > > > to > > > > > > > > handle the above I think. The reasoning is that reading a nand page is > > > > > > > > always like spinand_load_page_op() (opcode 0x13) + spinand_wait() + > > > > > > > > spinand_read_from_cache_op() so we could probably aggregate everything > > > > > > > > in the last call on the controller side without complicating the nand > > > > > > > > core > > > > > > > > logic. > > > > > > > > > > > > > > In general, drivers making assumptions has been a disaster in the raw > > > > > > > NAND world. This was the main reason for the ->exec_op() introduction > > > > > > > there: giving the whole operation to the controller so it can decide > > > > > > > what to do without guessing. But we thinking at the operation boundary, > > > > > > > not at the "set of operations" level. Since ->exec_op() in the SPI NAND > > > > > > > subsystem has been written following the same philosophy, I fear we're > > > > > > > going to try make rounds fit inside squares. One of the possible > > > > > > > > > > > > Fair enough! Agreed > > > > > > > > > > > > > approach would be to mimic what we've done for the some limited > > > > > > > controllers: pack everything in one single op (see the _monolithic > > > > > > > suffix in drivers/mtd/nand/raw/). That's just one idea. > > > > > > > > > > > > > > > > > > > I can take a look mostly for curiosity as my intention is not to "steal" > > > > > > this > > > > > > work > > > > > > from Fei. If everyone agrees (specially Fei), what I can do is to send my > > > > > > simpler > > > > > > patches that just support ACMD (without any special distinction between > > > > > > Nand and > > > > > > Nor) > > > > > > For Nands, I have a mix of STIG and ACMD, where big gains come from Nands > > > > > > with > > > > > > cont > > > > > > mode. > > > > > > > > > > > > Then we can build on top of it in order to improve Nand support (mostly on > > > > > > CPU > > > > > > load). > > > > > > > > > > I'm also interested in this driver's performance. A bit off the subject > > > > > but related question: Usually, the Soc may connect the xspi to dma > > > > > engine, I'm curious what would be the benefit of adding dma engine > > > > > support instead of ACMD? Is dma engine support simpler and > > > > > is the gain(performance + cpu load) more? > > > > > > > > > > > > > I'm not familiar with that approach tbh. But I would assume performance to be > > > > pretty > > > > much similar to what I have given that ACMD uses the IP internal DMA engine. > > > > But not > > > > using ACMD means not having the cpu gains at least for the smaller transfers as > > > > we > > > > would not be able to aggregate transfers. FWIW, given that you might not have > > > > looked > > > > > > Hmm, my platforms connect two dmaengine channels to the xspi controller, > > > but I haven't added the dma-engine support to the driver yet. If the > > > ACMD is enough, why HW connects dma-engine then? Just curious, there > > > must be performance gain I guess. But I'm not sure and I don't have > > > performance numbers. > > > > SO the IP has an internal DMA engine capable of acting as controller and driving the > bus AFAIU. So we do not really need any external dma_chan. Just need to use the dma > mapping API, > > > Aha, my platforms don't enable the ACMD support, instead, connect the > > xspi with dmac. > > > > So when upstreaming ACMD support, the driver needs to detect the ACMD > > support either dynamically or via. DT. Unfortunately, I didn't find > > any register can export the ACMD availability. DT is the only way? > > Or issue a simple ACMD and check SDMA error? > > I'm really not sure on your usecase. ACMD starts to payoff really when the transfers > start to be big enough. For example for my usecase, Im only using ACMD for reads > bigger than > 2KiB. That number is fixed but I suspect it's not that simple given > that It might depend on number of lanes and clock speeds. > > If I'm not missing anything, the easiest way to handle things would be to detect > dma_chan from DT and if available use it instead of ACMD. The ACMD needs an external SRAM, dmac needs an external dmac controller. So Below case is also valid: no dmac,ie no dma-chan from DT, and no ACMD support either. Especially, lowend SoCs would choose this combination. It seems something like "cdns,acmd" bool property is expected, but we need to ask for DT maintainer's suggestion. But if issuing simple, no-side-effect ACMD then check SDMA error during probe also works, then it's better than DT property IMHO.