From: Jamin Lin <jaminlin1207@gmail.com>
To: Emmanuel Blot <emmanuel.blot@free.fr>
Cc: qemu-devel@nongnu.org,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Jamin Lin" <jamin_lin@aspeedtech.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
qemu-arm@nongnu.org, "Fabiano Rosas" <farosas@suse.de>,
"Laurent Vivier" <lvivier@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>
Subject: Re: [PATCH 22/22] hw/arm: clemente: populate the FRU EEPROMs
Date: Fri, 16 Oct 2026 17:34:40 +0800 [thread overview]
Message-ID: <atHvsHf-v6WO6HgK@JaminLin-PC.aspeed.com> (raw)
In-Reply-To: <20261015-bmc-clemente-v1-22-bf591886b5b6@free.fr>
On Thu, Oct 15, 2026 at 01:58:00PM +0200, Emmanuel Blot via wrote:
> Back 24 of the 27 FRU EEPROMs with images read from hardware, so guest
> firmware can identify the boards, the compute and management modules,
> the network adapters, the I/O mezzanines and the drive backplanes
> instead of finding them blank. Two EEPROMs were erased on the sampled
> chassis and one was absent, so those three stay blank.
>
> The drive backplane and I/O mezzanine helpers each serve two instances
> carrying different images, so both now take a descriptor naming the
> EEPROMs they install.
>
> The content is sanitized: part and serial numbers masked, dates fixed,
> asset tags replaced, distinct originals kept distinct. Several images
> carry OEM MultiRecords whose contents are undocumented; the records are
> kept and their bodies zeroed.
>
> Signed-off-by: Emmanuel Blot <emmanuel.blot@free.fr>
> ---
> hw/arm/aspeed_ast2600_clemente.c | 974 +++++++++++++++++++++++++++++++++++++--
> 1 file changed, 948 insertions(+), 26 deletions(-)
>
> diff --git a/hw/arm/aspeed_ast2600_clemente.c b/hw/arm/aspeed_ast2600_clemente.c
> index bf5a13bc49..7937097c5b 100644
> --- a/hw/arm/aspeed_ast2600_clemente.c
> +++ b/hw/arm/aspeed_ast2600_clemente.c
> @@ -32,34 +32,937 @@
> #define CLEMENTE_BMC_HW_STRAP2 0x00000800
> #define CLEMENTE_BMC_RAM_SIZE (2 * GiB)
>
> +/*
> + * FRU images read back from hardware and sanitized: part and serial
> + * numbers are masked, manufacturing dates fixed and asset tags replaced,
> + * so the layout stays faithful while the identifying data is not real.
> + *
> + * Names are kept as programmed. The Board Info Area names the board, the
> + * Product Info Area the system it is installed in, so the boards sourced
> + * from a third party name their own vendor rather than the platform.
> + */
> +
> +/*
> + * FRU: i2c1 @0x50 (PDB)
> + * Board mfg: Ingrasys
> + * Board product: Clemente PDB PVT2
> + * Board part: 0A00AA000-001-A
> + * Board serial: 0A00AA00A0000A001
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver. 0.05A
> + * Product mfg: Ingrasys
> + * Product name: CI-Clemente
> + * Product part: 0A00A0A00-001-A
> + * Product version: PVT2
> + * Product serial: 0AAA00000001
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_1_0050[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x0c, 0x00, 0x00, 0xf2, 0x01, 0x0b, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73, 0xd1,
> + 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65, 0x20, 0x50, 0x44, 0x42,
> + 0x20, 0x50, 0x56, 0x54, 0x32, 0xd1, 0x30, 0x41, 0x30, 0x30, 0x41, 0x41,
> + 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x31, 0xcf,
> + 0x30, 0x41, 0x30, 0x30, 0x41, 0x41, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x31, 0x2d, 0x41, 0xce, 0x46, 0x52, 0x55, 0x20, 0x56, 0x65, 0x72, 0x2e,
> + 0x20, 0x30, 0x2e, 0x30, 0x35, 0x41, 0xc1, 0x00, 0x00, 0x00, 0x00, 0xbd,
> + 0x01, 0x09, 0x19, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73,
> + 0xcb, 0x43, 0x49, 0x2d, 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65,
> + 0xcf, 0x30, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x30, 0x30, 0x2d, 0x30,
> + 0x30, 0x31, 0x2d, 0x41, 0xc4, 0x50, 0x56, 0x54, 0x32, 0xcc, 0x30, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0xc4, 0x51,
> + 0x45, 0x4d, 0x55, 0xc0, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89,
> +};
> +
> +/*
> + * FRU: i2c9 @0x50 (SCM)
> + * Board mfg: Ingrasys
> + * Board product: Clemente SCM PVT2
> + * Board part: 0A00AA000-002-A
> + * Board serial: 0A00AA00A000002AA
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver. 0.05A
> + * Product mfg: Ingrasys
> + * Product name: CI-Clemente
> + * Product part: 0A00A0A00-001-A
> + * Product version: PVT2
> + * Product serial: 0AAA00000001
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_9_0050[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x0c, 0x00, 0x00, 0xf2, 0x01, 0x0b, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73, 0xd1,
> + 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65, 0x20, 0x53, 0x43, 0x4d,
> + 0x20, 0x50, 0x56, 0x54, 0x32, 0xd1, 0x30, 0x41, 0x30, 0x30, 0x41, 0x41,
> + 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x32, 0x41, 0x41, 0xcf,
> + 0x30, 0x41, 0x30, 0x30, 0x41, 0x41, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x32, 0x2d, 0x41, 0xce, 0x46, 0x52, 0x55, 0x20, 0x56, 0x65, 0x72, 0x2e,
> + 0x20, 0x30, 0x2e, 0x30, 0x35, 0x41, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x9d,
> + 0x01, 0x09, 0x00, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73,
> + 0xcb, 0x43, 0x49, 0x2d, 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65,
> + 0xcf, 0x30, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x30, 0x30, 0x2d, 0x30,
> + 0x30, 0x31, 0x2d, 0x41, 0xc4, 0x50, 0x56, 0x54, 0x32, 0xcc, 0x30, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0xc4, 0x51,
> + 0x45, 0x4d, 0x55, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62,
> +};
> +
> +/*
> + * FRU: i2c9 @0x56 (BSM)
> + * Board mfg: Ingrasys
> + * Board product: BMC Storage Module PVT2
> + * Board part: 0A00AAA00-003-A
> + * Board serial: 0A00AAA0A0000A003
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver. 0.05A
> + * Product mfg: Ingrasys
> + * Product name: CI-Clemente
> + * Product part: 0A00A0A00-001-A
> + * Product version: PVT2
> + * Product serial: 0AAA00000001
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_9_0056[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73, 0xd7,
> + 0x42, 0x4d, 0x43, 0x20, 0x53, 0x74, 0x6f, 0x72, 0x61, 0x67, 0x65, 0x20,
> + 0x4d, 0x6f, 0x64, 0x75, 0x6c, 0x65, 0x20, 0x50, 0x56, 0x54, 0x32, 0xd1,
> + 0x30, 0x41, 0x30, 0x30, 0x41, 0x41, 0x41, 0x30, 0x41, 0x30, 0x30, 0x30,
> + 0x30, 0x41, 0x30, 0x30, 0x33, 0xcf, 0x30, 0x41, 0x30, 0x30, 0x41, 0x41,
> + 0x41, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x33, 0x2d, 0x41, 0xce, 0x46, 0x52,
> + 0x55, 0x20, 0x56, 0x65, 0x72, 0x2e, 0x20, 0x30, 0x2e, 0x30, 0x35, 0x41,
> + 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x01, 0x09, 0x00, 0xc8,
> + 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73, 0xcb, 0x43, 0x49, 0x2d,
> + 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65, 0xcf, 0x30, 0x41, 0x30,
> + 0x30, 0x41, 0x30, 0x41, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x31, 0x2d, 0x41,
> + 0xc4, 0x50, 0x56, 0x54, 0x32, 0xcc, 0x30, 0x41, 0x41, 0x41, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0xc4, 0x51, 0x45, 0x4d, 0x55, 0xc1,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62,
> +};
> +
> +/*
> + * FRU: i2c10 @0x50 (OCP NIC0)
> + * Board mfg: Nvidia
> + * Board product: Nvidia ConnectX-7 OCP3.0
> + * Board part: AA00004AAA-AAAA_AA
> + * Board serial: AA0000A004AA
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver 0.01
> + * Product mfg: Nvidia
> + * Product name: Nvidia ConnectX-7 OCP3.0
> + * Product part: AA00002AAA-AAAA_AA
> + * Product version: A2
> + * Product serial: AA0000A002AA
> + * Product asset: QEMU
> + * OEM records: 1 (53 bytes, zeroed)
> + */
> +static const uint8_t fru_10_0050[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x0e, 0x1c, 0x00, 0xd4, 0x01, 0x0d, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc6, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0xd8, 0x4e, 0x76,
> + 0x69, 0x64, 0x69, 0x61, 0x20, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74,
> + 0x58, 0x2d, 0x37, 0x20, 0x4f, 0x43, 0x50, 0x33, 0x2e, 0x30, 0xd8, 0x41,
> + 0x41, 0x30, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x34, 0x41, 0x41, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xd5,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x34, 0x41, 0x41, 0x41, 0x2d, 0x41,
> + 0x41, 0x41, 0x41, 0x5f, 0x41, 0x41, 0x20, 0x20, 0x20, 0xcc, 0x46, 0x52,
> + 0x55, 0x20, 0x56, 0x65, 0x72, 0x20, 0x30, 0x2e, 0x30, 0x31, 0xc1, 0x00,
> + 0x00, 0x00, 0x00, 0xbf, 0x01, 0x0e, 0x19, 0xc6, 0x4e, 0x76, 0x69, 0x64,
> + 0x69, 0x61, 0xd8, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0x20, 0x43, 0x6f,
> + 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x37, 0x20, 0x4f, 0x43, 0x50,
> + 0x33, 0x2e, 0x30, 0xd5, 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x32, 0x41,
> + 0x41, 0x41, 0x2d, 0x41, 0x41, 0x41, 0x41, 0x5f, 0x41, 0x41, 0x20, 0x20,
> + 0x20, 0xd3, 0x41, 0x32, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xd8, 0x41, 0x41,
> + 0x30, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x32, 0x41, 0x41, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xc4, 0x51,
> + 0x45, 0x4d, 0x55, 0xc0, 0xc1, 0x00, 0x00, 0xfb, 0xc0, 0x82, 0x35, 0x00,
> + 0x89, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +};
> +
> +/*
> + * FRU: i2c12 @0x50 (HPM 1)
> + * Board mfg: NVIDIA
> + * Board product: PG548
> + * Board part: 000-0A000-0000-A05
> + * Board serial: 0000000000005
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Product mfg: NVIDIA
> + * Product name: GB300 1CPU:2GPU Board PC
> + * Product part: 000-0A000-0000-003
> + * Product version: C07
> + * Product serial: 0000000000003
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_12_0050[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x08, 0x00, 0x00, 0xf6, 0x01, 0x07, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc6, 0x4e, 0x56, 0x49, 0x44, 0x49, 0x41, 0xc5, 0x50, 0x47,
> + 0x35, 0x34, 0x38, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x35, 0xd2, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x41,
> + 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x41, 0x30, 0x35,
> + 0xc0, 0xc1, 0x00, 0xd8, 0x01, 0x0c, 0x19, 0xc6, 0x4e, 0x56, 0x49, 0x44,
> + 0x49, 0x41, 0xd8, 0x47, 0x42, 0x33, 0x30, 0x30, 0x20, 0x31, 0x43, 0x50,
> + 0x55, 0x3a, 0x32, 0x47, 0x50, 0x55, 0x20, 0x42, 0x6f, 0x61, 0x72, 0x64,
> + 0x20, 0x50, 0x43, 0xd2, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x41, 0x30, 0x30,
> + 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x33, 0xc3, 0x43,
> + 0x30, 0x37, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x33, 0xc4, 0x51, 0x45, 0x4d, 0x55, 0xcc, 0x46, 0x52,
> + 0x55, 0x5f, 0x56, 0x65, 0x72, 0x5f, 0x30, 0x2e, 0x30, 0x33, 0xc1, 0x00,
> + 0x00, 0x00, 0x00, 0x0d,
> +};
> +
> +/*
> + * FRU: i2c12 @0x54 (CBC 2)
> + * Chassis type: Blade Enclosure
> + * Chassis part: 000-00000-0000-001
> + * Chassis serial: 000AAAA000001
> + * Board mfg: Nvidia
> + * Board product: 18x1RU CBL Cartridge
> + * Board part: 000-0000-006
> + * Board serial: 0000000000006
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: HS33172S03
> + * Product name: 18x1RU CBL Cartridge
> + * Product part: 000-00000-0000-004
> + * Product version: E.4
> + * Product serial: 0000000000004
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_12_0054[] = {
> + 0x01, 0x00, 0x01, 0x07, 0x11, 0x00, 0x00, 0xe6, 0x01, 0x06, 0x1d, 0xd2,
> + 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x30, 0x30, 0x2d, 0x30, 0x30, 0x31, 0xcd, 0x30, 0x30, 0x30, 0x41, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x08, 0x02, 0x00, 0x03,
> + 0x02, 0x80, 0x12, 0x02, 0x00, 0xc1, 0x00, 0xcc, 0x01, 0x0a, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc6, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0xd4, 0x31, 0x38,
> + 0x78, 0x31, 0x52, 0x55, 0x20, 0x43, 0x42, 0x4c, 0x20, 0x43, 0x61, 0x72,
> + 0x74, 0x72, 0x69, 0x64, 0x67, 0x65, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x36, 0xcc, 0x30, 0x30, 0x30,
> + 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x36, 0xca, 0x48, 0x53,
> + 0x33, 0x33, 0x31, 0x37, 0x32, 0x53, 0x30, 0x33, 0xc1, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0xe7, 0x01, 0x0a, 0x19, 0xc0, 0xd4, 0x31, 0x38, 0x78,
> + 0x31, 0x52, 0x55, 0x20, 0x43, 0x42, 0x4c, 0x20, 0x43, 0x61, 0x72, 0x74,
> + 0x72, 0x69, 0x64, 0x67, 0x65, 0xd2, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x34,
> + 0xc3, 0x45, 0x2e, 0x34, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x34, 0xc4, 0x51, 0x45, 0x4d, 0x55, 0xca,
> + 0x48, 0x53, 0x33, 0x33, 0x31, 0x37, 0x32, 0x53, 0x30, 0x33, 0xc1, 0x39,
> +};
> +
> +/*
> + * FRU: i2c12 @0x55 (CBC 3)
> + * Chassis type: Blade Enclosure
> + * Chassis part: 000-00000-0000-001
> + * Chassis serial: 000AAAA000001
> + * Board mfg: Nvidia
> + * Board product: 18x1RU CBL Cartridge
> + * Board part: 000-0000-006
> + * Board serial: 0000000000007
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: HS33172S03
> + * Product name: 18x1RU CBL Cartridge
> + * Product part: 000-00000-0000-004
> + * Product version: E.4
> + * Product serial: 0000000000005
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_12_0055[] = {
> + 0x01, 0x00, 0x01, 0x07, 0x11, 0x00, 0x00, 0xe6, 0x01, 0x06, 0x1d, 0xd2,
> + 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x30, 0x30, 0x2d, 0x30, 0x30, 0x31, 0xcd, 0x30, 0x30, 0x30, 0x41, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x08, 0x02, 0x00, 0x03,
> + 0x02, 0x80, 0x12, 0x02, 0x00, 0xc1, 0x00, 0xcc, 0x01, 0x0a, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc6, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0xd4, 0x31, 0x38,
> + 0x78, 0x31, 0x52, 0x55, 0x20, 0x43, 0x42, 0x4c, 0x20, 0x43, 0x61, 0x72,
> + 0x74, 0x72, 0x69, 0x64, 0x67, 0x65, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x37, 0xcc, 0x30, 0x30, 0x30,
> + 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x36, 0xca, 0x48, 0x53,
> + 0x33, 0x33, 0x31, 0x37, 0x32, 0x53, 0x30, 0x33, 0xc1, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0xe6, 0x01, 0x0a, 0x19, 0xc0, 0xd4, 0x31, 0x38, 0x78,
> + 0x31, 0x52, 0x55, 0x20, 0x43, 0x42, 0x4c, 0x20, 0x43, 0x61, 0x72, 0x74,
> + 0x72, 0x69, 0x64, 0x67, 0x65, 0xd2, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x34,
> + 0xc3, 0x45, 0x2e, 0x34, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x35, 0xc4, 0x51, 0x45, 0x4d, 0x55, 0xca,
> + 0x48, 0x53, 0x33, 0x33, 0x31, 0x37, 0x32, 0x53, 0x30, 0x33, 0xc1, 0x38,
> +};
> +
> +/*
> + * FRU: i2c13 @0x50 (HPM)
> + * Board mfg: NVIDIA
> + * Board product: PG548
> + * Board part: 000-0A000-0000-A05
> + * Board serial: 0000000000008
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Product mfg: NVIDIA
> + * Product name: GB300 1CPU:2GPU Board PC
> + * Product part: 000-0A000-0000-003
> + * Product version: C07
> + * Product serial: 0000000000006
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_13_0050[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x08, 0x00, 0x00, 0xf6, 0x01, 0x07, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc6, 0x4e, 0x56, 0x49, 0x44, 0x49, 0x41, 0xc5, 0x50, 0x47,
> + 0x35, 0x34, 0x38, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x38, 0xd2, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x41,
> + 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x41, 0x30, 0x35,
> + 0xc0, 0xc1, 0x00, 0xd5, 0x01, 0x0c, 0x19, 0xc6, 0x4e, 0x56, 0x49, 0x44,
> + 0x49, 0x41, 0xd8, 0x47, 0x42, 0x33, 0x30, 0x30, 0x20, 0x31, 0x43, 0x50,
> + 0x55, 0x3a, 0x32, 0x47, 0x50, 0x55, 0x20, 0x42, 0x6f, 0x61, 0x72, 0x64,
> + 0x20, 0x50, 0x43, 0xd2, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x41, 0x30, 0x30,
> + 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x33, 0xc3, 0x43,
> + 0x30, 0x37, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x36, 0xc4, 0x51, 0x45, 0x4d, 0x55, 0xcc, 0x46, 0x52,
> + 0x55, 0x5f, 0x56, 0x65, 0x72, 0x5f, 0x30, 0x2e, 0x30, 0x33, 0xc1, 0x00,
> + 0x00, 0x00, 0x00, 0x0a,
> +};
> +
> +/*
> + * FRU: i2c13 @0x54 (CBC 0)
> + * Chassis type: Blade Enclosure
> + * Chassis part: 000-00000-0000-001
> + * Chassis serial: 000AAAA000001
> + * Board mfg: Nvidia
> + * Board product: 18x1RU CBL Cartridge
> + * Board part: 000-0000-006
> + * Board serial: 0000000000009
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: HS33172S03
> + * Product name: 18x1RU CBL Cartridge
> + * Product part: 000-00000-0000-004
> + * Product version: E.4
> + * Product serial: 0000000000007
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_13_0054[] = {
> + 0x01, 0x00, 0x01, 0x07, 0x11, 0x00, 0x00, 0xe6, 0x01, 0x06, 0x1d, 0xd2,
> + 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x30, 0x30, 0x2d, 0x30, 0x30, 0x31, 0xcd, 0x30, 0x30, 0x30, 0x41, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x08, 0x02, 0x00, 0x03,
> + 0x02, 0x80, 0x12, 0x02, 0x00, 0xc1, 0x00, 0xcc, 0x01, 0x0a, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc6, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0xd4, 0x31, 0x38,
> + 0x78, 0x31, 0x52, 0x55, 0x20, 0x43, 0x42, 0x4c, 0x20, 0x43, 0x61, 0x72,
> + 0x74, 0x72, 0x69, 0x64, 0x67, 0x65, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x39, 0xcc, 0x30, 0x30, 0x30,
> + 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x36, 0xca, 0x48, 0x53,
> + 0x33, 0x33, 0x31, 0x37, 0x32, 0x53, 0x30, 0x33, 0xc1, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0xe4, 0x01, 0x0a, 0x19, 0xc0, 0xd4, 0x31, 0x38, 0x78,
> + 0x31, 0x52, 0x55, 0x20, 0x43, 0x42, 0x4c, 0x20, 0x43, 0x61, 0x72, 0x74,
> + 0x72, 0x69, 0x64, 0x67, 0x65, 0xd2, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x34,
> + 0xc3, 0x45, 0x2e, 0x34, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x37, 0xc4, 0x51, 0x45, 0x4d, 0x55, 0xca,
> + 0x48, 0x53, 0x33, 0x33, 0x31, 0x37, 0x32, 0x53, 0x30, 0x33, 0xc1, 0x36,
> +};
> +
> +/*
> + * FRU: i2c13 @0x55 (CBC 1)
> + * Chassis type: Blade Enclosure
> + * Chassis part: 000-00000-0000-001
> + * Chassis serial: 000AAAA000001
> + * Board mfg: Nvidia
> + * Board product: 18x1RU CBL Cartridge
> + * Board part: 000-0000-006
> + * Board serial: 0000000000010
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: HS33172S03
> + * Product name: 18x1RU CBL Cartridge
> + * Product part: 000-00000-0000-004
> + * Product version: E.4
> + * Product serial: 0000000000008
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_13_0055[] = {
> + 0x01, 0x00, 0x01, 0x07, 0x11, 0x00, 0x00, 0xe6, 0x01, 0x06, 0x1d, 0xd2,
> + 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x30, 0x30, 0x2d, 0x30, 0x30, 0x31, 0xcd, 0x30, 0x30, 0x30, 0x41, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x08, 0x02, 0x00, 0x03,
> + 0x02, 0x80, 0x15, 0x01, 0x00, 0xc1, 0x00, 0xca, 0x01, 0x0a, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc6, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0xd4, 0x31, 0x38,
> + 0x78, 0x31, 0x52, 0x55, 0x20, 0x43, 0x42, 0x4c, 0x20, 0x43, 0x61, 0x72,
> + 0x74, 0x72, 0x69, 0x64, 0x67, 0x65, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x30, 0xcc, 0x30, 0x30, 0x30,
> + 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x36, 0xca, 0x48, 0x53,
> + 0x33, 0x33, 0x31, 0x37, 0x32, 0x53, 0x30, 0x33, 0xc1, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0xec, 0x01, 0x0a, 0x19, 0xc0, 0xd4, 0x31, 0x38, 0x78,
> + 0x31, 0x52, 0x55, 0x20, 0x43, 0x42, 0x4c, 0x20, 0x43, 0x61, 0x72, 0x74,
> + 0x72, 0x69, 0x64, 0x67, 0x65, 0xd2, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x34,
> + 0xc3, 0x45, 0x2e, 0x34, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x38, 0xc4, 0x51, 0x45, 0x4d, 0x55, 0xca,
> + 0x48, 0x53, 0x33, 0x33, 0x31, 0x37, 0x32, 0x53, 0x30, 0x33, 0xc1, 0x35,
> +};
> +
> +/*
> + * FRU: i2c13 @0x57 (HMC)
> + * Board mfg: NVIDIA
> + * Board product: P4764-A02
> + * Board part: 000-00000-0000-007
> + * Board serial: 0000000000011
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Product mfg: NVIDIA
> + * Product name: HMC for GB200 NVL72
> + * Product part: 000-00000-0000-005
> + * Product version: A1
> + * Product serial: 0000000000009
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_13_0057[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x09, 0x00, 0x00, 0xf5, 0x01, 0x08, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc6, 0x4e, 0x56, 0x49, 0x44, 0x49, 0x41, 0xc9, 0x50, 0x34,
> + 0x37, 0x36, 0x34, 0x2d, 0x41, 0x30, 0x32, 0xcd, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x31, 0xd2, 0x30, 0x30,
> + 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30,
> + 0x2d, 0x30, 0x30, 0x37, 0xc0, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x39,
> + 0x01, 0x0b, 0x19, 0xc6, 0x4e, 0x56, 0x49, 0x44, 0x49, 0x41, 0xd3, 0x48,
> + 0x4d, 0x43, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x47, 0x42, 0x32, 0x30, 0x30,
> + 0x20, 0x4e, 0x56, 0x4c, 0x37, 0x32, 0xd2, 0x30, 0x30, 0x30, 0x2d, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x35, 0xc2, 0x41, 0x31, 0xcd, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x39, 0xc4, 0x51, 0x45, 0x4d, 0x55, 0xcc,
> + 0x46, 0x52, 0x55, 0x5f, 0x56, 0x65, 0x72, 0x5f, 0x30, 0x2e, 0x30, 0x32,
> + 0xc1, 0x00, 0x00, 0xcb,
> +};
> +
> +/*
> + * FRU: i2c15 @0x52 (OCP NIC1)
> + * Board mfg: Nvidia
> + * Board product: Nvidia ConnectX-7 OCP3.0
> + * Board part: AA00004AAA-AAAA_AA
> + * Board serial: AA0000A0012A
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver 0.01
> + * Product mfg: Nvidia
> + * Product name: Nvidia ConnectX-7 OCP3.0
> + * Product part: AA00002AAA-AAAA_AA
> + * Product version: A2
> + * Product serial: AA0000A0010A
> + * Product asset: QEMU
> + * OEM records: 1 (53 bytes, zeroed)
> + */
> +static const uint8_t fru_15_0052[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x0e, 0x1c, 0x00, 0xd4, 0x01, 0x0d, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc6, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0xd8, 0x4e, 0x76,
> + 0x69, 0x64, 0x69, 0x61, 0x20, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74,
> + 0x58, 0x2d, 0x37, 0x20, 0x4f, 0x43, 0x50, 0x33, 0x2e, 0x30, 0xd8, 0x41,
> + 0x41, 0x30, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x31, 0x32, 0x41, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xd5,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x34, 0x41, 0x41, 0x41, 0x2d, 0x41,
> + 0x41, 0x41, 0x41, 0x5f, 0x41, 0x41, 0x20, 0x20, 0x20, 0xcc, 0x46, 0x52,
> + 0x55, 0x20, 0x56, 0x65, 0x72, 0x20, 0x30, 0x2e, 0x30, 0x31, 0xc1, 0x00,
> + 0x00, 0x00, 0x00, 0xd1, 0x01, 0x0e, 0x19, 0xc6, 0x4e, 0x76, 0x69, 0x64,
> + 0x69, 0x61, 0xd8, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0x20, 0x43, 0x6f,
> + 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x37, 0x20, 0x4f, 0x43, 0x50,
> + 0x33, 0x2e, 0x30, 0xd5, 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x32, 0x41,
> + 0x41, 0x41, 0x2d, 0x41, 0x41, 0x41, 0x41, 0x5f, 0x41, 0x41, 0x20, 0x20,
> + 0x20, 0xd3, 0x41, 0x32, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xd8, 0x41, 0x41,
> + 0x30, 0x30, 0x30, 0x30, 0x41, 0x30, 0x30, 0x31, 0x30, 0x41, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xc4, 0x51,
> + 0x45, 0x4d, 0x55, 0xc0, 0xc1, 0x00, 0x00, 0x0d, 0xc0, 0x82, 0x35, 0x00,
> + 0x89, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +};
> +
> +/*
> + * FRU: i2c21 @0x54 (interposer)
> + * Board mfg: Ingrasys
> + * Board product: Clemente Interposer PVT2
> + * Board part: 0A00AA000-008-A
> + * Board serial: 0A00AA00A0001A3AA
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver. 0.05A
> + * Product mfg: Ingrasys
> + * Product name: CI-Clemente
> + * Product part: 0A00A0A00-001-A
> + * Product version: PVT2
> + * Product serial: 0AAA00000001
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_21_0054[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73, 0xd8,
> + 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65, 0x20, 0x49, 0x6e, 0x74,
> + 0x65, 0x72, 0x70, 0x6f, 0x73, 0x65, 0x72, 0x20, 0x50, 0x56, 0x54, 0x32,
> + 0xd1, 0x30, 0x41, 0x30, 0x30, 0x41, 0x41, 0x30, 0x30, 0x41, 0x30, 0x30,
> + 0x30, 0x31, 0x41, 0x33, 0x41, 0x41, 0xcf, 0x30, 0x41, 0x30, 0x30, 0x41,
> + 0x41, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x38, 0x2d, 0x41, 0xce, 0x46,
> + 0x52, 0x55, 0x20, 0x56, 0x65, 0x72, 0x2e, 0x20, 0x30, 0x2e, 0x30, 0x35,
> + 0x41, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, 0x01, 0x09, 0x00, 0xc8,
> + 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73, 0xcb, 0x43, 0x49, 0x2d,
> + 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65, 0xcf, 0x30, 0x41, 0x30,
> + 0x30, 0x41, 0x30, 0x41, 0x30, 0x30, 0x2d, 0x30, 0x30, 0x31, 0x2d, 0x41,
> + 0xc4, 0x50, 0x56, 0x54, 0x32, 0xcc, 0x30, 0x41, 0x41, 0x41, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0xc4, 0x51, 0x45, 0x4d, 0x55, 0xc1,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62,
> +};
> +
> +/*
> + * FRU: i2c23 @0x51 (FIO)
> + * Board mfg: Ingrasys
> + * Board product: Clemente FIO PVT2
> + * Board part: 0A00A0A00-009-A
> + * Board serial: 0A00A0A0A0000A14A
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver. 0.05A
> + * Product mfg: Ingrasys
> + * Product name: CI-Clemente
> + * Product part: 0A00A0A00-001-A
> + * Product version: PVT2
> + * Product serial: 0AAA00000001
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_23_0051[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x0c, 0x00, 0x00, 0xf2, 0x01, 0x0b, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73, 0xd1,
> + 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65, 0x20, 0x46, 0x49, 0x4f,
> + 0x20, 0x50, 0x56, 0x54, 0x32, 0xd1, 0x30, 0x41, 0x30, 0x30, 0x41, 0x30,
> + 0x41, 0x30, 0x41, 0x30, 0x30, 0x30, 0x30, 0x41, 0x31, 0x34, 0x41, 0xcf,
> + 0x30, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x30, 0x30, 0x2d, 0x30, 0x30,
> + 0x39, 0x2d, 0x41, 0xce, 0x46, 0x52, 0x55, 0x20, 0x56, 0x65, 0x72, 0x2e,
> + 0x20, 0x30, 0x2e, 0x30, 0x35, 0x41, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x98,
> + 0x01, 0x09, 0x00, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73,
> + 0xcb, 0x43, 0x49, 0x2d, 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65,
> + 0xcf, 0x30, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x30, 0x30, 0x2d, 0x30,
> + 0x30, 0x31, 0x2d, 0x41, 0xc4, 0x50, 0x56, 0x54, 0x32, 0xcc, 0x30, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0xc4, 0x51,
> + 0x45, 0x4d, 0x55, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62,
> +};
> +
> +/*
> + * FRU: i2c25 @0x56 (E1.S backplane 0)
> + * Board mfg: Ingrasys
> + * Board product: Clemente E1.S BP PVT2
> + * Board part: 0A00AA000-010-A
> + * Board serial: 0A00AA00A0001A5AA
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver. 0.05A
> + * Product mfg: Ingrasys
> + * Product name: CI-Clemente
> + * Product part: 0A00A0A00-001-A
> + * Product version: PVT2
> + * Product serial: 0AAA00000001
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_25_0056[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x0c, 0x00, 0x00, 0xf2, 0x01, 0x0b, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73, 0xd5,
> + 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65, 0x20, 0x45, 0x31, 0x2e,
> + 0x53, 0x20, 0x42, 0x50, 0x20, 0x50, 0x56, 0x54, 0x32, 0xd1, 0x30, 0x41,
> + 0x30, 0x30, 0x41, 0x41, 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x31, 0x41,
> + 0x35, 0x41, 0x41, 0xcf, 0x30, 0x41, 0x30, 0x30, 0x41, 0x41, 0x30, 0x30,
> + 0x30, 0x2d, 0x30, 0x31, 0x30, 0x2d, 0x41, 0xce, 0x46, 0x52, 0x55, 0x20,
> + 0x56, 0x65, 0x72, 0x2e, 0x20, 0x30, 0x2e, 0x30, 0x35, 0x41, 0xc1, 0xbf,
> + 0x01, 0x09, 0x00, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73,
> + 0xcb, 0x43, 0x49, 0x2d, 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65,
> + 0xcf, 0x30, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x30, 0x30, 0x2d, 0x30,
> + 0x30, 0x31, 0x2d, 0x41, 0xc4, 0x50, 0x56, 0x54, 0x32, 0xcc, 0x30, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0xc4, 0x51,
> + 0x45, 0x4d, 0x55, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62,
> +};
> +
> +/*
> + * FRU: i2c29 @0x50 (IO mezzanine 0)
> + * Board mfg: Nvidia
> + * Board product: ConnectX-8 800GE 2P NIC
> + * Board part: 000-0A00A-A1AA-AA1
> + * Board serial: AA0000001AA6
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver 0.01
> + * Product mfg: Nvidia
> + * Product name: ConnectX-8 800GE 2P NIC
> + * Product part: 000-0A00A-A0AA-AA6
> + * Product version: A1
> + * Product serial: AA0000001AA1
> + * Product asset: QEMU
> + * OEM records: 1 (25 bytes, zeroed)
> + */
> +static const uint8_t fru_29_0050[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x15, 0x2a, 0x00, 0xbf, 0x01, 0x14, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xd9, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0xf2, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74,
> + 0x58, 0x2d, 0x38, 0x20, 0x38, 0x30, 0x30, 0x47, 0x45, 0x20, 0x32, 0x50,
> + 0x20, 0x4e, 0x49, 0x43, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xdd, 0x41, 0x41, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x30, 0x31, 0x41, 0x41, 0x36, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0xdd, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x41, 0x30, 0x30, 0x41, 0x2d,
> + 0x41, 0x31, 0x41, 0x41, 0x2d, 0x41, 0x41, 0x31, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xcc, 0x46, 0x52, 0x55, 0x20,
> + 0x56, 0x65, 0x72, 0x20, 0x30, 0x2e, 0x30, 0x31, 0xc1, 0x00, 0x00, 0xd4,
> + 0x01, 0x15, 0x19, 0xd9, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0xf2, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63,
> + 0x74, 0x58, 0x2d, 0x38, 0x20, 0x38, 0x30, 0x30, 0x47, 0x45, 0x20, 0x32,
> + 0x50, 0x20, 0x4e, 0x49, 0x43, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xdd, 0x30, 0x30, 0x30,
> + 0x2d, 0x30, 0x41, 0x30, 0x30, 0x41, 0x2d, 0x41, 0x30, 0x41, 0x41, 0x2d,
> + 0x41, 0x41, 0x36, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0xc7, 0x41, 0x31, 0x20, 0x20, 0x20, 0x20, 0x20, 0xdd, 0x41,
> + 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x41, 0x41, 0x31, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0xc4, 0x51, 0x45, 0x4d, 0x55, 0xcc, 0x46, 0x52,
> + 0x55, 0x20, 0x56, 0x65, 0x72, 0x20, 0x30, 0x2e, 0x30, 0x31, 0xc1, 0x75,
> + 0xd0, 0x82, 0x19, 0x00, 0x95, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +};
> +
> +/*
> + * FRU: i2c29 @0x52 (IO mezzanine 0 OSFP)
> + * Board mfg: Ingrasys
> + * Board product: Clemente OSFP PVT2
> + * Board part: 0A00AAA00-012-A
> + * Board serial: 0A00AAA0A000017AA
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver. 0.05A
> + * Product mfg: Ingrasys
> + * Product name: CI-Clemente
> + * Product part: 0A00A0A00-001-A
> + * Product version: PVT2
> + * Product serial: 0AAA00000001
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_29_0052[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x0c, 0x00, 0x00, 0xf2, 0x01, 0x0b, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73, 0xd2,
> + 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65, 0x20, 0x4f, 0x53, 0x46,
> + 0x50, 0x20, 0x50, 0x56, 0x54, 0x32, 0xd1, 0x30, 0x41, 0x30, 0x30, 0x41,
> + 0x41, 0x41, 0x30, 0x41, 0x30, 0x30, 0x30, 0x30, 0x31, 0x37, 0x41, 0x41,
> + 0xcf, 0x30, 0x41, 0x30, 0x30, 0x41, 0x41, 0x41, 0x30, 0x30, 0x2d, 0x30,
> + 0x31, 0x32, 0x2d, 0x41, 0xce, 0x46, 0x52, 0x55, 0x20, 0x56, 0x65, 0x72,
> + 0x2e, 0x20, 0x30, 0x2e, 0x30, 0x35, 0x41, 0xc1, 0x00, 0x00, 0x00, 0x1e,
> + 0x01, 0x09, 0x00, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73,
> + 0xcb, 0x43, 0x49, 0x2d, 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65,
> + 0xcf, 0x30, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x30, 0x30, 0x2d, 0x30,
> + 0x30, 0x31, 0x2d, 0x41, 0xc4, 0x50, 0x56, 0x54, 0x32, 0xcc, 0x30, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0xc4, 0x51,
> + 0x45, 0x4d, 0x55, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62,
> +};
> +
> +/*
> + * FRU: i2c37 @0x56 (E1.S backplane 1)
> + * Board mfg: Ingrasys
> + * Board product: Clemente E1.S BP PVT2
> + * Board part: 0A00AA000-010-A
> + * Board serial: 0A00AA00A0001A8AA
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver. 0.05A
> + * Product mfg: Ingrasys
> + * Product name: CI-Clemente
> + * Product part: 0A00A0A00-001-A
> + * Product version: PVT2
> + * Product serial: 0AAA00000001
> + * Product asset: QEMU
> + */
> +static const uint8_t fru_37_0056[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x0c, 0x00, 0x00, 0xf2, 0x01, 0x0b, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73, 0xd5,
> + 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65, 0x20, 0x45, 0x31, 0x2e,
> + 0x53, 0x20, 0x42, 0x50, 0x20, 0x50, 0x56, 0x54, 0x32, 0xd1, 0x30, 0x41,
> + 0x30, 0x30, 0x41, 0x41, 0x30, 0x30, 0x41, 0x30, 0x30, 0x30, 0x31, 0x41,
> + 0x38, 0x41, 0x41, 0xcf, 0x30, 0x41, 0x30, 0x30, 0x41, 0x41, 0x30, 0x30,
> + 0x30, 0x2d, 0x30, 0x31, 0x30, 0x2d, 0x41, 0xce, 0x46, 0x52, 0x55, 0x20,
> + 0x56, 0x65, 0x72, 0x2e, 0x20, 0x30, 0x2e, 0x30, 0x35, 0x41, 0xc1, 0xbc,
> + 0x01, 0x09, 0x00, 0xc8, 0x49, 0x6e, 0x67, 0x72, 0x61, 0x73, 0x79, 0x73,
> + 0xcb, 0x43, 0x49, 0x2d, 0x43, 0x6c, 0x65, 0x6d, 0x65, 0x6e, 0x74, 0x65,
> + 0xcf, 0x30, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x30, 0x30, 0x2d, 0x30,
> + 0x30, 0x31, 0x2d, 0x41, 0xc4, 0x50, 0x56, 0x54, 0x32, 0xcc, 0x30, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0xc4, 0x51,
> + 0x45, 0x4d, 0x55, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x62,
> +};
> +
> +/*
> + * FRU: i2c41 @0x50 (IO mezzanine 1)
> + * Board mfg: Nvidia
> + * Board product: ConnectX-8 800GE 2P NIC
> + * Board part: 000-0A00A-A1AA-AA1
> + * Board serial: AA0000019AAA
> + * Board mfg date: 2026-01-01T00:00:00Z
> + * Board file ID: FRU Ver 0.01
> + * Product mfg: Nvidia
> + * Product name: ConnectX-8 800GE 2P NIC
> + * Product part: 000-0A00A-A0AA-AA6
> + * Product version: A1
> + * Product serial: AA0000012AAA
> + * Product asset: QEMU
> + * OEM records: 1 (25 bytes, zeroed)
> + */
> +static const uint8_t fru_41_0050[] = {
> + 0x01, 0x00, 0x00, 0x01, 0x15, 0x2a, 0x00, 0xbf, 0x01, 0x14, 0x19, 0xc0,
> + 0xc6, 0xf0, 0xd9, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0xf2, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74,
> + 0x58, 0x2d, 0x38, 0x20, 0x38, 0x30, 0x30, 0x47, 0x45, 0x20, 0x32, 0x50,
> + 0x20, 0x4e, 0x49, 0x43, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xdd, 0x41, 0x41, 0x30, 0x30,
> + 0x30, 0x30, 0x30, 0x31, 0x39, 0x41, 0x41, 0x41, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0xdd, 0x30, 0x30, 0x30, 0x2d, 0x30, 0x41, 0x30, 0x30, 0x41, 0x2d,
> + 0x41, 0x31, 0x41, 0x41, 0x2d, 0x41, 0x41, 0x31, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xcc, 0x46, 0x52, 0x55, 0x20,
> + 0x56, 0x65, 0x72, 0x20, 0x30, 0x2e, 0x30, 0x31, 0xc1, 0x00, 0x00, 0xc0,
> + 0x01, 0x15, 0x19, 0xd9, 0x4e, 0x76, 0x69, 0x64, 0x69, 0x61, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0xf2, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63,
> + 0x74, 0x58, 0x2d, 0x38, 0x20, 0x38, 0x30, 0x30, 0x47, 0x45, 0x20, 0x32,
> + 0x50, 0x20, 0x4e, 0x49, 0x43, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xdd, 0x30, 0x30, 0x30,
> + 0x2d, 0x30, 0x41, 0x30, 0x30, 0x41, 0x2d, 0x41, 0x30, 0x41, 0x41, 0x2d,
> + 0x41, 0x41, 0x36, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0xc7, 0x41, 0x31, 0x20, 0x20, 0x20, 0x20, 0x20, 0xdd, 0x41,
> + 0x41, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x32, 0x41, 0x41, 0x41, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
> + 0x20, 0x20, 0x20, 0x20, 0xc4, 0x51, 0x45, 0x4d, 0x55, 0xcc, 0x46, 0x52,
> + 0x55, 0x20, 0x56, 0x65, 0x72, 0x20, 0x30, 0x2e, 0x30, 0x31, 0xc1, 0x63,
> + 0xd0, 0x82, 0x19, 0x00, 0x95, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +};
> +
> +/*
> + * FRU: i2c45 @0x53 (boot drive)
> + * Product mfg: Samsung
> + * Product name: PM9D3a
> + * Product part: AAAA00A0AAAA-07AAA
> + * Product version:
> + * Product serial: A0AAAA0A000013
> + * OEM records: 3 (91 bytes, zeroed)
> + */
> +static const uint8_t fru_45_0053[] = {
> + 0x01, 0x00, 0x00, 0x00, 0x01, 0x0f, 0x00, 0xef, 0x01, 0x0e, 0x19, 0xc8,
> + 0x53, 0x61, 0x6d, 0x73, 0x75, 0x6e, 0x67, 0x00, 0xd8, 0x50, 0x4d, 0x39,
> + 0x44, 0x33, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0x41, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x41, 0x41, 0x41, 0x2d, 0x30,
> + 0x37, 0x41, 0x41, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0xc2, 0x00, 0x00, 0xd4, 0x41, 0x30, 0x41, 0x41, 0x41, 0x41,
> + 0x30, 0x41, 0x30, 0x30, 0x30, 0x30, 0x31, 0x33, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x33,
> + 0x0b, 0x02, 0x3b, 0x00, 0xb8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x0c, 0x02, 0x0b, 0x00, 0xe7, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x82, 0x15, 0x00,
> + 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +};
> +
> +/*
> + * FRU: i2c48 @0x53 (E1.S backplane 0 drive 0)
> + * Product mfg: Samsung
> + * Product name: PM9D3a
> + * Product part: AAAA00A0AAAA-08AAA
> + * Product version:
> + * Product serial: A0A0AA0A000014
> + * OEM records: 3 (91 bytes, zeroed)
> + */
> +static const uint8_t fru_48_0053[] = {
> + 0x01, 0x00, 0x00, 0x00, 0x01, 0x0f, 0x00, 0xef, 0x01, 0x0e, 0x19, 0xc8,
> + 0x53, 0x61, 0x6d, 0x73, 0x75, 0x6e, 0x67, 0x00, 0xd8, 0x50, 0x4d, 0x39,
> + 0x44, 0x33, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0x41, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x41, 0x41, 0x41, 0x2d, 0x30,
> + 0x38, 0x41, 0x41, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0xc2, 0x00, 0x00, 0xd4, 0x41, 0x30, 0x41, 0x30, 0x41, 0x41,
> + 0x30, 0x41, 0x30, 0x30, 0x30, 0x30, 0x31, 0x34, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x42,
> + 0x0b, 0x02, 0x3b, 0x00, 0xb8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x0c, 0x02, 0x0b, 0x00, 0xe7, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x82, 0x15, 0x00,
> + 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +};
> +
> +/*
> + * FRU: i2c50 @0x53 (E1.S backplane 0 drive 2)
> + * Product mfg: Samsung
> + * Product name: PM9D3a
> + * Product part: AAAA00A0AAAA-08AAA
> + * Product version:
> + * Product serial: A0A0AA0A000015
> + * OEM records: 3 (91 bytes, zeroed)
> + */
> +static const uint8_t fru_50_0053[] = {
> + 0x01, 0x00, 0x00, 0x00, 0x01, 0x0f, 0x00, 0xef, 0x01, 0x0e, 0x19, 0xc8,
> + 0x53, 0x61, 0x6d, 0x73, 0x75, 0x6e, 0x67, 0x00, 0xd8, 0x50, 0x4d, 0x39,
> + 0x44, 0x33, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0x41, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x41, 0x41, 0x41, 0x2d, 0x30,
> + 0x38, 0x41, 0x41, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0xc2, 0x00, 0x00, 0xd4, 0x41, 0x30, 0x41, 0x30, 0x41, 0x41,
> + 0x30, 0x41, 0x30, 0x30, 0x30, 0x30, 0x31, 0x35, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41,
> + 0x0b, 0x02, 0x3b, 0x00, 0xb8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x0c, 0x02, 0x0b, 0x00, 0xe7, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x82, 0x15, 0x00,
> + 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +};
> +
> +/*
> + * FRU: i2c52 @0x53 (E1.S backplane 1 drive 0)
> + * Product mfg: Samsung
> + * Product name: PM9D3a
> + * Product part: AAAA00A0AAAA-08AAA
> + * Product version:
> + * Product serial: A0A0AA0A000016
> + * OEM records: 3 (91 bytes, zeroed)
> + */
> +static const uint8_t fru_52_0053[] = {
> + 0x01, 0x00, 0x00, 0x00, 0x01, 0x0f, 0x00, 0xef, 0x01, 0x0e, 0x19, 0xc8,
> + 0x53, 0x61, 0x6d, 0x73, 0x75, 0x6e, 0x67, 0x00, 0xd8, 0x50, 0x4d, 0x39,
> + 0x44, 0x33, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0x41, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x41, 0x41, 0x41, 0x2d, 0x30,
> + 0x38, 0x41, 0x41, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0xc2, 0x00, 0x00, 0xd4, 0x41, 0x30, 0x41, 0x30, 0x41, 0x41,
> + 0x30, 0x41, 0x30, 0x30, 0x30, 0x30, 0x31, 0x36, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40,
> + 0x0b, 0x02, 0x3b, 0x00, 0xb8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x0c, 0x02, 0x0b, 0x00, 0xe7, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x82, 0x15, 0x00,
> + 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +};
> +
> +/*
> + * FRU: i2c54 @0x53 (E1.S backplane 1 drive 2)
> + * Product mfg: Samsung
> + * Product name: PM9D3a
> + * Product part: AAAA00A0AAAA-08AAA
> + * Product version:
> + * Product serial: A0A0AA0A000017
> + * OEM records: 3 (91 bytes, zeroed)
> + */
> +static const uint8_t fru_54_0053[] = {
> + 0x01, 0x00, 0x00, 0x00, 0x01, 0x0f, 0x00, 0xef, 0x01, 0x0e, 0x19, 0xc8,
> + 0x53, 0x61, 0x6d, 0x73, 0x75, 0x6e, 0x67, 0x00, 0xd8, 0x50, 0x4d, 0x39,
> + 0x44, 0x33, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0x41, 0x41,
> + 0x41, 0x41, 0x30, 0x30, 0x41, 0x30, 0x41, 0x41, 0x41, 0x41, 0x2d, 0x30,
> + 0x38, 0x41, 0x41, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0xc2, 0x00, 0x00, 0xd4, 0x41, 0x30, 0x41, 0x30, 0x41, 0x41,
> + 0x30, 0x41, 0x30, 0x30, 0x30, 0x30, 0x31, 0x37, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f,
> + 0x0b, 0x02, 0x3b, 0x00, 0xb8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x0c, 0x02, 0x0b, 0x00, 0xe7, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x82, 0x15, 0x00,
> + 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> +};
> +
> +typedef struct ClementeFru {
> + const uint8_t *data;
> + size_t size;
> +} ClementeFru;
> +
> +/* The images an E1.S backplane needs: its own FRU and its two drives. */
> +typedef struct ClementeE1sFru {
> + ClementeFru backplane; /* @0x56 */
> + ClementeFru drive0; /* mux channel 0 @0x53 */
> + ClementeFru drive2; /* mux channel 2 @0x53 */
> +} ClementeE1sFru;
> +
> +static const ClementeE1sFru clemente_e1s_fru[] = {
> + {
> + .backplane = { fru_25_0056, sizeof(fru_25_0056) },
> + .drive0 = { fru_48_0053, sizeof(fru_48_0053) },
> + .drive2 = { fru_50_0053, sizeof(fru_50_0053) },
> + },
> + {
> + .backplane = { fru_37_0056, sizeof(fru_37_0056) },
> + .drive0 = { fru_52_0053, sizeof(fru_52_0053) },
> + .drive2 = { fru_54_0053, sizeof(fru_54_0053) },
> + },
> +};
> +
> +/* The images an IO mezzanine needs: its own FRU and the OSFP one. */
> +typedef struct ClementeIoMezzFru {
> + ClementeFru mezzanine; /* @0x50 */
> + ClementeFru osfp; /* @0x52 */
> +} ClementeIoMezzFru;
> +
> +static const ClementeIoMezzFru clemente_io_mezz_fru[] = {
> + {
> + .mezzanine = { fru_29_0050, sizeof(fru_29_0050) },
> + .osfp = { fru_29_0052, sizeof(fru_29_0052) },
> + },
> + {
> + .mezzanine = { fru_41_0050, sizeof(fru_41_0050) },
> + /* the OSFP FRU was absent from the sampled chassis */
> + },
> +};
> +
> /*
> * E1.S backplane hanging off a PCA9546 channel: an FRU EEPROM plus a
> * second PCA9546 fronting per-drive NVMe SSD FRU EEPROMs.
> */
> -static void clemente_e1s_backplane_init(I2CBus *bus)
> +static void clemente_e1s_backplane_init(I2CBus *bus,
> + const ClementeE1sFru *fru)
> {
> /* eeprom@56 - atmel,24c128 */
> - at24c_eeprom_init(bus, 0x56, 16 * KiB);
> + at24c_eeprom_init_rom(bus, 0x56, 16 * KiB,
> + fru->backplane.data, fru->backplane.size);
>
> /* i2c-mux@74 - PCA9546 */
> I2CSlave *mux = i2c_slave_create_simple(bus, TYPE_PCA9546, 0x74);
> /* eeprom@53 - atmel,24c02, channels 0 and 2 */
> - at24c_eeprom_init(pca954x_i2c_get_bus(mux, 0), 0x53, 256);
> - at24c_eeprom_init(pca954x_i2c_get_bus(mux, 2), 0x53, 256);
> + at24c_eeprom_init_rom(pca954x_i2c_get_bus(mux, 0), 0x53, 256,
> + fru->drive0.data, fru->drive0.size);
> + at24c_eeprom_init_rom(pca954x_i2c_get_bus(mux, 2), 0x53, 256,
> + fru->drive2.data, fru->drive2.size);
> }
>
> /*
> * IO Mezzanine hanging off a PCA9546 channel: an I/O expander plus the
> * mezzanine and OSFP FRU EEPROMs.
> */
> -static void clemente_io_mezz_init(I2CBus *bus, uint8_t exp_addr)
> +static void clemente_io_mezz_init(I2CBus *bus, uint8_t exp_addr,
> + const ClementeIoMezzFru *fru)
> {
> /* gpio@20/21 - nxp,pca9535 */
> i2c_slave_create_simple(bus, TYPE_PCA9535, exp_addr);
> /* eeprom@50 - atmel,24c64 (mezzanine FRU) */
> - at24c_eeprom_init(bus, 0x50, 8 * KiB);
> + at24c_eeprom_init_rom(bus, 0x50, 8 * KiB,
> + fru->mezzanine.data, fru->mezzanine.size);
> /* eeprom@52 - atmel,24c128 (OSFP FRU) */
> - at24c_eeprom_init(bus, 0x52, 16 * KiB);
> + at24c_eeprom_init_rom(bus, 0x52, 16 * KiB,
> + fru->osfp.data, fru->osfp.size);
> }
>
> static void clemente_bmc_i2c_init(AspeedMachineState *bmc)
> @@ -78,12 +981,14 @@ static void clemente_bmc_i2c_init(AspeedMachineState *bmc)
> /* i2c-mux@71 (PCA9546) */
> i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x71);
> /* channel 1 - HDD FRU eeprom@56 and E1.S backplane */
> - clemente_e1s_backplane_init(pca954x_i2c_get_bus(i2c_mux, 1));
> + clemente_e1s_backplane_init(pca954x_i2c_get_bus(i2c_mux, 1),
> + &clemente_e1s_fru[0]);
>
> /* i2c-mux@72 (PCA9546) */
> i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x72);
> /* channel 1 - IO Mezz 0 (io_expander7 @20) */
> - clemente_io_mezz_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x20);
> + clemente_io_mezz_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x20,
> + &clemente_io_mezz_fru[0]);
>
> /* i2c-mux@73 (PCA9546) - channels empty */
> i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x73);
> @@ -91,17 +996,20 @@ static void clemente_bmc_i2c_init(AspeedMachineState *bmc)
> /* i2c-mux@75 (PCA9546) */
> i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x75);
> /* channel 1 - HDD FRU eeprom@56 and E1.S backplane */
> - clemente_e1s_backplane_init(pca954x_i2c_get_bus(i2c_mux, 1));
> + clemente_e1s_backplane_init(pca954x_i2c_get_bus(i2c_mux, 1),
> + &clemente_e1s_fru[1]);
>
> /* i2c-mux@76 (PCA9546) */
> i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x76);
> /* channel 1 - IO Mezz 1 (io_expander8 @21) */
> - clemente_io_mezz_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x21);
> + clemente_io_mezz_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x21,
> + &clemente_io_mezz_fru[1]);
>
> /* i2c-mux@77 (PCA9546) */
> i2c_mux = i2c_slave_create_simple(i2c[0], TYPE_PCA9546, 0x77);
> /* channel 1 - boot drive FRU eeprom@53 */
> - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 1), 0x53, 256);
> + at24c_eeprom_init_rom(pca954x_i2c_get_bus(i2c_mux, 1), 0x53, 256,
> + fru_45_0053, sizeof(fru_45_0053));
>
> /* &i2c1 */
> /* power-monitor@12/14 - ti,lm5066i (no model) */
> @@ -110,7 +1018,8 @@ static void clemente_bmc_i2c_init(AspeedMachineState *bmc)
> /* temperature-sensor@4e - ti,tmp1075 */
> i2c_slave_create_simple(i2c[1], TYPE_TMP1075, 0x4e);
> /* eeprom@50 - atmel,24c02 (PDB FRU) */
> - at24c_eeprom_init(i2c[1], 0x50, 256);
> + at24c_eeprom_init_rom(i2c[1], 0x50, 256, fru_1_0050,
> + sizeof(fru_1_0050));
> /* vrm@60/61 - renesas,raa228004 (no model) */
> /* i2c-mux@70 (PCA9548) - interposer */
> i2c_mux = i2c_slave_create_simple(i2c[1], TYPE_PCA9548, 0x70);
> @@ -118,7 +1027,8 @@ static void clemente_bmc_i2c_init(AspeedMachineState *bmc)
> /* temperature-sensor@4f - ti,tmp75 */
> i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), TYPE_TMP75, 0x4f);
> /* eeprom@54 - atmel,24c64 */
> - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 5), 0x54, 8 * KiB);
> + at24c_eeprom_init_rom(pca954x_i2c_get_bus(i2c_mux, 5), 0x54,
> + 8 * KiB, fru_21_0054, sizeof(fru_21_0054));
> /* channel 6 - io_expander5 gpio@27 - nxp,pca9554 */
> i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6),
> TYPE_PCA9554, 0x27);
> @@ -126,7 +1036,8 @@ static void clemente_bmc_i2c_init(AspeedMachineState *bmc)
> /* temperature-sensor@4b - ti,tmp75 */
> i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 7), TYPE_TMP75, 0x4b);
> /* eeprom@51 - atmel,24c64 */
> - at24c_eeprom_init(pca954x_i2c_get_bus(i2c_mux, 7), 0x51, 8 * KiB);
> + at24c_eeprom_init_rom(pca954x_i2c_get_bus(i2c_mux, 7), 0x51,
> + 8 * KiB, fru_23_0051, sizeof(fru_23_0051));
>
> /* &i2c2 */
> /* gpio@20/21/27 - nxp,pca9555 */
> @@ -156,35 +1067,45 @@ static void clemente_bmc_i2c_init(AspeedMachineState *bmc)
> /* gpio@4f - nxp,pca9555 */
> i2c_slave_create_simple(i2c[9], TYPE_PCA9555, 0x4f);
> /* eeprom@50 - atmel,24c64 (SCM FRU) */
> - at24c_eeprom_init(i2c[9], 0x50, 8 * KiB);
> + at24c_eeprom_init_rom(i2c[9], 0x50, 8 * KiB, fru_9_0050,
> + sizeof(fru_9_0050));
> /* eeprom@56 - atmel,24c64 (BSM FRU) */
> - at24c_eeprom_init(i2c[9], 0x56, 8 * KiB);
> + at24c_eeprom_init_rom(i2c[9], 0x56, 8 * KiB, fru_9_0056,
> + sizeof(fru_9_0056));
>
> /* &i2c10 */
> /* mctp@10 - mctp-i2c-controller (no model) */
> /* temperature-sensor@1f - ti,tmp421 (OCP NIC0) */
> i2c_slave_create_simple(i2c[10], TYPE_TMP421, 0x1f);
> /* eeprom@50 - atmel,24c64 (OCP NIC0 FRU) */
> - at24c_eeprom_init(i2c[10], 0x50, 8 * KiB);
> + at24c_eeprom_init_rom(i2c[10], 0x50, 8 * KiB, fru_10_0050,
> + sizeof(fru_10_0050));
>
> /* &i2c11 */
> /* ssif-bmc@10 - ssif-bmc (no model) */
>
> /* &i2c12 */
> /* eeprom@50 - atmel,24c64 (HPM 1 FRU) */
> - at24c_eeprom_init(i2c[12], 0x50, 8 * KiB);
> + at24c_eeprom_init_rom(i2c[12], 0x50, 8 * KiB, fru_12_0050,
> + sizeof(fru_12_0050));
> /* eeprom@54/55 - atmel,24c02 (CBC 2/3 FRU) */
> - at24c_eeprom_init(i2c[12], 0x54, 256);
> - at24c_eeprom_init(i2c[12], 0x55, 256);
> + at24c_eeprom_init_rom(i2c[12], 0x54, 256, fru_12_0054,
> + sizeof(fru_12_0054));
> + at24c_eeprom_init_rom(i2c[12], 0x55, 256, fru_12_0055,
> + sizeof(fru_12_0055));
>
> /* &i2c13 */
> /* eeprom@50 - atmel,24c64 (HPM FRU) */
> - at24c_eeprom_init(i2c[13], 0x50, 8 * KiB);
> + at24c_eeprom_init_rom(i2c[13], 0x50, 8 * KiB, fru_13_0050,
> + sizeof(fru_13_0050));
> /* eeprom@54/55 - atmel,24c02 (CBC 0/1 FRU) */
> - at24c_eeprom_init(i2c[13], 0x54, 256);
> - at24c_eeprom_init(i2c[13], 0x55, 256);
> + at24c_eeprom_init_rom(i2c[13], 0x54, 256, fru_13_0054,
> + sizeof(fru_13_0054));
> + at24c_eeprom_init_rom(i2c[13], 0x55, 256, fru_13_0055,
> + sizeof(fru_13_0055));
> /* eeprom@57 - atmel,24c02 (HMC FRU) */
> - at24c_eeprom_init(i2c[13], 0x57, 256);
> + at24c_eeprom_init_rom(i2c[13], 0x57, 256, fru_13_0057,
> + sizeof(fru_13_0057));
>
> /* &i2c14 */
> /* gpio@10/11/12/13/14 - nxp,pca9555 (PDB CPLD) */
> @@ -199,7 +1120,8 @@ static void clemente_bmc_i2c_init(AspeedMachineState *bmc)
> /* temperature-sensor@1f - ti,tmp421 (OCP NIC1) */
> i2c_slave_create_simple(i2c[15], TYPE_TMP421, 0x1f);
> /* eeprom@52 - atmel,24c64 (OCP NIC1 FRU) */
> - at24c_eeprom_init(i2c[15], 0x52, 8 * KiB);
> + at24c_eeprom_init_rom(i2c[15], 0x52, 8 * KiB, fru_15_0052,
> + sizeof(fru_15_0052));
> }
>
> static void aspeed_machine_clemente_class_init(ObjectClass *oc,
>
> --
> 2.53.0-Meta
>
>
Reviewed-by: Jamin Lin <jaminlin1207@gmail.com>
prev parent reply other threads:[~2026-10-16 9:35 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-15 11:57 [PATCH 00/22] Aspeed: TMP421 and TMP1075 sensors, and the Clemente BMC machine Emmanuel Blot via
2026-10-15 11:57 ` Emmanuel Blot via qemu development
2026-10-15 11:57 ` [PATCH 01/22] hw/sensor: tmp421: do not report a stale errno on a parse failure Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 02/22] hw/sensor: tmp421: name the parent object field parent_obj Emmanuel Blot via
2026-10-15 11:57 ` Emmanuel Blot via qemu development
2026-10-15 11:57 ` [PATCH 03/22] hw/sensor: tmp421: implement Resettable reset Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 04/22] hw/sensor: tmp421: model device variants with a class descriptor Emmanuel Blot via
2026-10-15 11:57 ` Emmanuel Blot via qemu development
2026-10-15 11:57 ` [PATCH 05/22] hw/sensor: tmp421: honor per-variant channels and channel enablement Emmanuel Blot via
2026-10-15 11:57 ` Emmanuel Blot via qemu development
2026-10-15 11:57 ` [PATCH 06/22] hw/sensor: tmp421: implement register write masks, one-shot and N-factor Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 07/22] hw/sensor: tmp421: describe the temperature properties Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 08/22] hw/sensor: tmp421: keep the measurement across a range change Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 09/22] hw/sensor: tmp421: migrate the exact measurement Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 10/22] hw/sensor: tmp421: publish the variant type names Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 11/22] hw/arm/aspeed: use the TMP421 type-name macros Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-16 5:19 ` 林建明
2026-10-15 11:57 ` [PATCH 12/22] tests/qtest: tmp421: cover device IDs and reset defaults Emmanuel Blot via
2026-10-15 11:57 ` Emmanuel Blot via qemu development
2026-10-15 11:57 ` [PATCH 13/22] tests/qtest: tmp421: cover temperature encoding and range Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 14/22] tests/qtest: tmp421: cover per-variant channels and enablement Emmanuel Blot via
2026-10-15 11:57 ` Emmanuel Blot via qemu development
2026-10-15 11:57 ` [PATCH 15/22] tests/qtest: tmp421: cover software reset and N-factor registers Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 16/22] tests/qtest: tmp421: cover the register form of the migration stream Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 17/22] hw/sensor: tmp105: add the TMP1075 variant Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 18/22] tests/qtest: tmp105: cover the TMP1075 device ID and reset defaults Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 19/22] tests/qtest: tmp105: cover the TMP1075 config register width Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 20/22] tests/qtest: tmp105: cover the Config low byte across a migration Emmanuel Blot via qemu development
2026-10-15 11:57 ` Emmanuel Blot via
2026-10-15 11:57 ` [PATCH 21/22] hw/arm: clemente: add Facebook Clemente BMC machine Emmanuel Blot via
2026-10-15 11:57 ` Emmanuel Blot via qemu development
2026-10-16 9:34 ` Jamin Lin
2026-10-15 11:58 ` [PATCH 22/22] hw/arm: clemente: populate the FRU EEPROMs Emmanuel Blot via qemu development
2026-10-15 11:58 ` Emmanuel Blot via
2026-10-16 9:34 ` Jamin Lin [this message]
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