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dmarc=pass (p=quarantine dis=none) header.from=kernel.org Authentication-Results: smtp4.osuosl.org; dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=RuU/8QYY Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by smtp4.osuosl.org (Postfix) with ESMTPS id F026040960 for ; Fri, 16 Oct 2026 12:23:30 +0000 (UTC) Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 3E22A600D4; Fri, 16 Oct 2026 12:23:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 21F421F000C4; Fri, 16 Oct 2026 12:23:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1792153409; bh=qdjfIIZCym6bazSk4RbMEYGsuzY81NRzxM8jW5geif8=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=RuU/8QYYaWV5sBkOdrjb/M5Vm2keWMlmBm56JDyMjBIGjjCXZgS5td6at1VJHZurr gvdCPT8e+sNk8fYRu3wdpWrd3+zwss1b5tyE/zDYINq8ljomtWxsV35OCjrJveoENI a4+rHXrs1jK6l7nXGACCw4STwIfamPl8g5AyGRu/W8mtQafHP4I1UulIoAsmP+789K f0yA84hz8+oZRX2ybrkkKObXjqzCMrwW8wRuhUdZRW7nTrSyrnj8V4WnyEJU/Zc0AQ ceUli4bqDibDlrfOVMWFQZvplj+ZZ/JohFtyLVhcE7WeNioJdqX0p27DeSW8tp7kiX /hWZfuK2UTC3Q== Date: Fri, 16 Oct 2026 17:53:23 +0530 From: Sumit Garg To: Balaji Selvanathan Cc: Sumit Garg , u-boot-qcom@groups.io, u-boot@lists.u-boot-project.org, Casey Connolly , Neil Armstrong , Tom Rini , Varadarajan Narayanan Subject: Re: [PATCH v2] phy: qcom: qmp-combo: honor USB-C orientation for port select Message-ID: References: <20261013-ss-orientation-v2-1-8daddb44447e@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <20261013-ss-orientation-v2-1-8daddb44447e@oss.qualcomm.com> X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.u-boot-project.org On Tue, 13 Oct 2026 at 22:38:09 +0530, Balaji Selvanathan wrote: >The TypeC port-select mux was always programmed with SW_PORTSELECT_MUX >set and SW_PORTSELECT_VAL left clear, regardless of which way the >USB-C cable was inserted. On a board where the cable goes in reversed, >the SuperSpeed/DP lanes end up routed to the wrong side of the >connector, so USB3/DP never comes up correctly. > >Cable orientation is reported by a GPIO on the qcom,pmic-glink node >("orientation-gpios"), and is now sampled each time the PHY is >enabled to check for the orientation. > >Taken from Linux commit 815891eee668 ("phy: qcom-qmp-combo: Introduce >orientation variable"). > >Tested on QCS6490 RB3 Gen2 board. > >Signed-off-by: Balaji Selvanathan >--- >Changes in v2: >- Instead of reading the orientation at probe, read it only during the PHY init >- Updated the commit message to better explain why this change is required >- Link to v1: https://lore.kernel.org/u-boot/20260724-kodiak_ss_orientation-v1-1-d9d8fd271e0c@oss.qualcomm.com/ >--- > drivers/phy/qcom/phy-qcom-qmp-combo.c | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) Reviewed-by: Sumit Garg -Sumit > >diff --git a/drivers/phy/qcom/phy-qcom-qmp-combo.c b/drivers/phy/qcom/phy-qcom-qmp-combo.c >index 0d63e482ee4..65141489d51 100644 >--- a/drivers/phy/qcom/phy-qcom-qmp-combo.c >+++ b/drivers/phy/qcom/phy-qcom-qmp-combo.c >@@ -7,10 +7,12 @@ > #include > #include > #include >+#include > #include > #include > #include > #include >+#include > #include > #include > #include >@@ -39,6 +41,7 @@ > #define DP_MODE BIT(1) /* enables DP mode */ > > /* QPHY_V3_DP_COM_TYPEC_CTRL register bits */ >+#define SW_PORTSELECT_VAL BIT(0) > #define SW_PORTSELECT_MUX BIT(1) > > /* PHY slot identifiers for device tree phandle arguments */ >@@ -283,6 +286,27 @@ static int qmp_combo_com_exit(struct qmp_combo *qmp) > return 0; > } > >+static bool qmp_combo_read_orientation(void) >+{ >+ ofnode node; >+ struct gpio_desc desc; >+ int ret, val; >+ >+ node = ofnode_by_compatible(ofnode_null(), "qcom,pmic-glink"); >+ if (!ofnode_valid(node)) >+ return false; >+ >+ ret = gpio_request_by_name_nodev(node, "orientation-gpios", 0, >+ &desc, GPIOD_IS_IN); >+ if (ret) >+ return false; >+ >+ val = dm_gpio_get_value(&desc); >+ dm_gpio_free(desc.dev, &desc); >+ >+ return val > 0; >+} >+ > static int qmp_combo_com_init(struct qmp_combo *qmp) > { > void __iomem *com = qmp->com; >@@ -333,6 +357,8 @@ static int qmp_combo_com_init(struct qmp_combo *qmp) > SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET); > > val = SW_PORTSELECT_MUX; >+ if (qmp_combo_read_orientation()) >+ val |= SW_PORTSELECT_VAL; > writel(val, com + QPHY_V3_DP_COM_TYPEC_CTRL); > > writel(USB3_MODE | DP_MODE, com + QPHY_V3_DP_COM_PHY_MODE_CTRL); > >--- >base-commit: fed92546960a92177d67c0b8d7b22385f50fed29 >change-id: 20261013-ss-orientation-d85a156e806a > >Best regards, >-- >Balaji Selvanathan >