From: Thierry Reding <thierry.reding@kernel.org>
To: Svyatoslav Ryhel <clamor95@gmail.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jonathan Hunter <jonathanh@nvidia.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Jessica Zhang <jesszhan0024@gmail.com>,
Mikko Perttunen <mperttunen@nvidia.com>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 02/10] drm/panel: Convert Hitachi TX10D07VM0BAA to use MIPI DBI bus
Date: Fri, 6 Nov 2026 14:19:42 +0100 [thread overview]
Message-ID: <au3TcHXFt5Yhs_V8@orome> (raw)
In-Reply-To: <20261105140510.165165-3-clamor95@gmail.com>
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On Thu, Nov 05, 2026 at 04:05:02PM +0200, Svyatoslav Ryhel wrote:
> Switch from a generic platform driver to a dedicated MIPI DBI driver.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
> .../drm/panel/panel-hitachi-tx10d07vm0baa.c | 167 ++++++++----------
> 1 file changed, 78 insertions(+), 89 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-hitachi-tx10d07vm0baa.c b/drivers/gpu/drm/panel/panel-hitachi-tx10d07vm0baa.c
> index 83c2af1be9755..d5d7ba2096608 100644
> --- a/drivers/gpu/drm/panel/panel-hitachi-tx10d07vm0baa.c
> +++ b/drivers/gpu/drm/panel/panel-hitachi-tx10d07vm0baa.c
> @@ -14,6 +14,7 @@
> #include <video/mipi_display.h>
>
> #include <drm/drm_mipi_dbi.h>
> +#include <drm/drm_mipi_dbi_bus.h>
> #include <drm/drm_modes.h>
> #include <drm/drm_of.h>
> #include <drm/drm_panel.h>
> @@ -25,7 +26,7 @@ static const struct regulator_bulk_data hitachi_tx10d07vm0baa_supplies[] = {
>
> struct hitachi_tx10d07vm0baa {
> struct drm_panel panel;
> - struct mipi_dbi *dbi;
> + struct mipi_dbi_device *dbi;
It's somewhat difficult to exactly see the difference between mipi_dbi
and mipi_dbi_device. Maybe that should be explained better in the cover
letter of patch 1? Or the documentation added in patch1.
>
> struct regulator_bulk_data *supplies;
> struct gpio_desc *reset_gpio;
> @@ -36,13 +37,12 @@ static inline struct hitachi_tx10d07vm0baa *to_hitachi_tx10d07vm0baa(struct drm_
> return container_of(panel, struct hitachi_tx10d07vm0baa, panel);
> }
>
> -#define panel_dbi_command(priv, cmd, seq...) \
> +#define panel_dbi_command(dbidev, cmd, seq...) \
> ({ \
> const u8 d[] = { seq }; \
> - struct drm_panel *panel = &(priv)->panel; \
> - struct device *dev = panel->dev; \
> + struct device *dev = &(dbidev)->dev; \
> int ret; \
> - ret = mipi_dbi_command_stackbuf((priv)->dbi, cmd, d, ARRAY_SIZE(d)); \
> + ret = mipi_dbi_command_stackbuf((dbidev)->dbi, cmd, d, ARRAY_SIZE(d)); \
> if (ret) \
> dev_err_ratelimited(dev, "error %d when sending command %#02x\n", ret, cmd); \
> ret; \
> @@ -54,10 +54,6 @@ static int hitachi_tx10d07vm0baa_prepare(struct drm_panel *panel)
> struct device *dev = panel->dev;
> int ret;
>
> - priv->dbi = dev_get_drvdata(dev->parent);
> - if (!priv->dbi)
> - return -ENODEV;
> -
> gpiod_set_value_cansleep(priv->reset_gpio, 1);
>
> ret = regulator_bulk_enable(ARRAY_SIZE(hitachi_tx10d07vm0baa_supplies), priv->supplies);
> @@ -79,123 +75,116 @@ static int hitachi_tx10d07vm0baa_enable(struct drm_panel *panel)
> {
> struct hitachi_tx10d07vm0baa *priv = to_hitachi_tx10d07vm0baa(panel);
>
> - panel_dbi_command(priv, MIPI_DCS_SET_PARTIAL_ROWS, 0x00, 0x00, 0x03, 0x1f);
> - panel_dbi_command(priv, MIPI_DCS_SET_SCROLL_AREA, 0x00, 0x00, 0x03, 0x20,
> + panel_dbi_command(priv->dbi, MIPI_DCS_SET_PARTIAL_ROWS, 0x00, 0x00, 0x03, 0x1f);
> + panel_dbi_command(priv->dbi, MIPI_DCS_SET_SCROLL_AREA, 0x00, 0x00, 0x03, 0x20,
> 0x00, 0x00);
The majority of the changes in this file are s/priv/priv->dbi/, so maybe
just make it so that priv = priv->db and keep the changes to a minimum?
Thierry
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next prev parent reply other threads:[~2026-11-06 13:19 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-05 14:05 [PATCH v6 00/10] drm/tegra: Add support for Tegra20/Tegra30 8-bit CPU interface Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 01/10] drm: Add MIPI DBI bus support for MIPI DBI Type A and B Svyatoslav Ryhel
2026-11-06 13:14 ` Thierry Reding
2026-11-06 13:59 ` Svyatoslav Ryhel
2026-11-06 15:19 ` Thierry Reding
2026-11-07 13:54 ` Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 02/10] drm/panel: Convert Hitachi TX10D07VM0BAA to use MIPI DBI bus Svyatoslav Ryhel
2026-11-06 13:19 ` Thierry Reding [this message]
2026-11-06 14:00 ` Svyatoslav Ryhel
2026-11-06 15:26 ` Thierry Reding
2026-11-07 13:57 ` Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 03/10] drm/panel: Convert LG LH400WV3-SD04 " Svyatoslav Ryhel
2026-11-06 13:23 ` Thierry Reding
2026-11-06 14:01 ` Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 04/10] drm/tegra: dc: Refactor and expand header Svyatoslav Ryhel
2026-11-06 13:56 ` Thierry Reding
2026-11-06 14:06 ` Svyatoslav Ryhel
2026-11-09 2:48 ` Mikko Perttunen
2026-11-05 14:05 ` [PATCH v6 05/10] dt-bindings: display: tegra: Document Tegra20 DSI port Svyatoslav Ryhel
2026-11-06 14:16 ` Rob Herring (Arm)
2026-11-05 14:05 ` [PATCH v6 06/10] drm/tegra: Make panel parsing by tegra_output_probe() optional Svyatoslav Ryhel
2026-11-06 14:00 ` Thierry Reding
2026-11-06 14:09 ` Svyatoslav Ryhel
2026-11-06 15:34 ` Thierry Reding
2026-11-05 14:05 ` [PATCH v6 07/10] drm/tegra: Convert to use atomic versions of drm_encoder_helper_funcs Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 08/10] drm/tegra: rgb: Parameterize configuration based on bus flags Svyatoslav Ryhel
2026-11-05 14:05 ` [PATCH v6 09/10] dt-bindings: display: tegra: Document 8-bit CPU parallel interface Svyatoslav Ryhel
2026-11-05 22:58 ` Rob Herring (Arm)
2026-11-06 14:08 ` Thierry Reding
2026-11-06 14:11 ` Svyatoslav Ryhel
2026-11-06 14:40 ` Thierry Reding
2026-11-06 14:48 ` Svyatoslav Ryhel
2026-11-06 15:51 ` Thierry Reding
2026-11-09 2:38 ` Mikko Perttunen
2026-11-05 14:05 ` [PATCH v6 10/10] drm/tegra: Add support for 8-bit CPU interface Svyatoslav Ryhel
2026-11-06 14:38 ` Thierry Reding
2026-11-06 14:53 ` Svyatoslav Ryhel
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