From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Mika Kahola <mika.kahola@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/display: Limit the eDP joiner to the pipe A and B pair
Date: Fri, 6 Nov 2026 17:25:03 +0200 [thread overview]
Message-ID: <au3xT5fiaiEdpIN-@intel.com> (raw)
In-Reply-To: <20261106094113.2917630-1-mika.kahola@intel.com>
On Fri, Nov 06, 2026 at 09:41:13AM +0000, Mika Kahola wrote:
> eDP only works joined as the pipe A and B pair, other consecutive pairs
> fail to come up.
There is no such restriction. Just tried it on a PTL here and it works
just fine.
> Keep the eDP joiner primary on pipe A. DP and unjoined
> eDP are unaffected.
>
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 21 ++++++++++++++++-----
> 1 file changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ef164a797618..b359a66a018f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1362,16 +1362,27 @@ static int intel_dp_mso_pixel_clock(struct intel_dp *intel_dp, int pixel_clock)
> return pixel_clock / intel_dp->mso_link_count;
> }
>
> +/* eDP can only be joined as the pipe A and B pair. */
> +static u8 intel_dp_joiner_valid_primary_pipe_mask(struct intel_dp *intel_dp,
> + int num_joined_pipes)
> +{
> + struct intel_display *display = to_intel_display(intel_dp);
> + u8 pipe_mask = intel_joiner_valid_primary_pipe_mask(display, num_joined_pipes);
> +
> + if (num_joined_pipes > 1 && intel_dp_is_edp(intel_dp))
> + pipe_mask &= BIT(PIPE_A);
> +
> + return pipe_mask;
> +}
> +
> static
> bool intel_dp_can_join(struct intel_dp *intel_dp,
> int num_joined_pipes)
> {
> - struct intel_display *display = to_intel_display(intel_dp);
> -
> if (num_joined_pipes > 1 && !intel_dp_has_joiner(intel_dp))
> return false;
>
> - return intel_joiner_valid_primary_pipe_mask(display, num_joined_pipes);
> + return intel_dp_joiner_valid_primary_pipe_mask(intel_dp, num_joined_pipes);
> }
>
> bool intel_dp_dotclk_valid(struct intel_display *display,
> @@ -3083,7 +3094,6 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
> struct drm_connector_state *conn_state,
> bool respect_downstream_limits)
> {
> - struct intel_display *display = to_intel_display(encoder);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct intel_connector *connector =
> to_intel_connector(conn_state->connector);
> @@ -3099,7 +3109,8 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>
> for_each_joiner_candidate(connector, adjusted_mode, num_joined_pipes) {
> /* If the pipe can't be a joiner primary, skip early. */
> - if (!(intel_joiner_valid_primary_pipe_mask(display, num_joined_pipes) & BIT(crtc->pipe)))
> + if (!(intel_dp_joiner_valid_primary_pipe_mask(intel_dp, num_joined_pipes) &
> + BIT(crtc->pipe)))
> continue;
>
> /*
> --
> 2.43.0
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2026-11-06 15:25 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 9:41 [PATCH] drm/i915/display: Limit the eDP joiner to the pipe A and B pair Mika Kahola
2026-11-06 9:50 ` ✓ CI.KUnit: success for " Patchwork
2026-11-06 10:07 ` [PATCH] " sashiko-bot
2026-11-06 10:25 ` ✓ Xe.CI.BAT: success for " Patchwork
2026-11-06 10:28 ` ✓ i915.CI.BAT: " Patchwork
2026-11-06 15:25 ` Ville Syrjälä [this message]
2026-11-09 13:01 ` [PATCH] " Kahola, Mika
2026-11-06 18:04 ` ✗ i915.CI.Full: failure for " Patchwork
2026-11-07 11:04 ` ✗ Xe.CI.FULL: " Patchwork
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