From: Yosry Ahmed <yosry@kernel.org>
To: Zide Chen <zide.chen@intel.com>
Cc: Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
kvm@vger.kernel.org, Jim Mattson <jmattson@google.com>,
Andi Kleen <ak@linux.intel.com>,
Stephane Eranian <eranian@google.com>,
linux-kernel@vger.kernel.org, Mingwei Zhang <mizhang@google.com>,
Das Sandipan <Sandipan.Das@amd.com>,
Shukla Manali <Manali.Shukla@amd.com>,
Dapeng Mi <dapeng1.mi@linux.intel.com>,
Xudong Hao <xudong.hao@intel.com>
Subject: Re: [PATCH v3 08/18] KVM: x86/pmu: Switch to bitmask-based KVM PMU capabilities
Date: Fri, 6 Nov 2026 20:05:40 +0000 [thread overview]
Message-ID: <au4wUM4fwB47Yss9@google.com> (raw)
In-Reply-To: <20261106013927.166209-9-zide.chen@intel.com>
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index adafd6fa2c54..3310c370c5fa 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -1535,10 +1535,18 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
> }
>
> eax.split.version_id = kvm_pmu_cap.version;
> - eax.split.num_counters = kvm_pmu_cap.num_counters_gp;
> +
> + /* Contiguous GP counters only. */
> + eax.split.num_counters =
> + find_first_zero_bit(kvm_pmu_cap.cntr_mask,
> + KVM_MAX_NR_GP_COUNTERS);
> eax.split.bit_width = kvm_pmu_cap.bit_width_gp;
> eax.split.mask_length = kvm_pmu_cap.events_mask_len;
> - edx.split.num_counters_fixed = kvm_pmu_cap.num_counters_fixed;
> +
> + /* Contiguous fixed counters only. */
> + edx.split.num_counters_fixed =
> + find_first_zero_bit(kvm_pmu_cap.fixed_cntr_mask,
> + KVM_MAX_NR_FIXED_COUNTERS);
> edx.split.bit_width_fixed = kvm_pmu_cap.bit_width_fixed;
>
> if (kvm_pmu_cap.version)
> @@ -1903,7 +1911,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
>
> cpuid_entry_override(entry, CPUID_8000_0022_EAX);
>
> - ebx.split.num_core_pmc = kvm_pmu_cap.num_counters_gp;
> + ebx.split.num_core_pmc = hweight64(kvm_pmu_cap.cntr_mask64);
Should this be the number of contiguous counters?
> entry->ebx = ebx.full;
> break;
> }
[..]
> @@ -516,7 +517,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
> union cpuid10_edx edx;
> u64 perf_capabilities;
> u64 fixed_mask;
> - int nr_gp_counters;
> + int nr_gp_counters, nr_fixed_counters;
> u64 counter_rsvd;
>
> if (!lbr_desc)
> @@ -550,16 +551,25 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
> kvm_pmu_cap.events_mask_len);
> pmu->available_event_types = ~entry->ebx & (BIT_ULL(eax.split.mask_length) - 1);
>
> - fixed_mask = BIT_ULL(edx.split.num_counters_fixed) - 1;
> - fixed_mask &= BIT_ULL(kvm_pmu_cap.num_counters_fixed) - 1;
> + /*
> + * CPUID.0AH:EDX[4:0] can only enumerate contiguous counters. Clamp the
> + * value to the number of contiguous fixed counters supported by KVM.
> + */
> + nr_fixed_counters = min_t(int, edx.split.num_counters_fixed,
> + find_first_zero_bit(kvm_pmu_cap.fixed_cntr_mask,
> + KVM_MAX_NR_FIXED_COUNTERS));
> +
> + fixed_mask = BIT_ULL(nr_fixed_counters) - 1;
> + fixed_mask &= kvm_pmu_cap.fixed_cntr_mask64;
Isn't nr_fixed_counters already clamped to the number of contiguous bits
in fixed_cntr_mask?
>
> /*
> - * The number of counters comes from guest CPUID data. Clamp the value
> - * to avoid a shift-by-64 in BIT_ULL().
> + * CPUID.0AH:EAX[15:8] can only enumerate contiguous counters. Clamp the
> + * value to the number of contiguous GP counters supported by KVM.
> */
> - nr_gp_counters = min_t(int, eax.split.num_counters, X86_PMC_IDX_MAX - 1);
> - pmu->pmc_exists64 = (BIT_ULL(nr_gp_counters) - 1) &
> - (BIT_ULL(kvm_pmu_cap.num_counters_gp) - 1);
> + nr_gp_counters = min_t(int, eax.split.num_counters,
> + find_first_zero_bit(kvm_pmu_cap.cntr_mask,
> + KVM_MAX_NR_GP_COUNTERS));
> + pmu->pmc_exists64 = BIT_ULL(nr_gp_counters) - 1;
>
> entry = kvm_find_cpuid_entry_index(vcpu, 7, 0);
next prev parent reply other threads:[~2026-11-06 20:05 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 1:39 [PATCH v3 00/18] KVM: x86/pmu: Add mediated vPMU PerfMon v5 support Zide Chen
2026-11-06 1:39 ` [PATCH v3 01/18] KVM: x86/pmu: Remove redundant Perf Global Status MSR bit definitions Zide Chen
2026-11-06 18:19 ` Yosry Ahmed
2026-11-06 1:39 ` [PATCH v3 02/18] KVM: x86/pmu: Rename all_valid_pmc_idx to pmc_exists Zide Chen
2026-11-06 18:21 ` Yosry Ahmed
2026-11-06 1:39 ` [PATCH v3 03/18] KVM: x86/pmu: Rename reserved_bits to eventsel_rsvd in kvm_pmu Zide Chen
2026-11-06 18:37 ` Yosry Ahmed
2026-11-06 21:16 ` Chen, Zide
2026-11-06 22:38 ` Yosry Ahmed
2026-11-06 1:39 ` [PATCH v3 04/18] KVM: x86/pmu: Add PMC bitmap accessor helpers Zide Chen
2026-11-06 19:09 ` Yosry Ahmed
2026-11-06 22:19 ` Chen, Zide
2026-11-06 22:35 ` Yosry Ahmed
2026-11-09 7:53 ` Mi, Dapeng
2026-11-09 17:56 ` Chen, Zide
2026-11-09 17:55 ` Chen, Zide
2026-11-09 18:07 ` Yosry Ahmed
2026-11-09 18:59 ` Chen, Zide
2026-11-09 21:12 ` Yosry Ahmed
2026-11-09 21:59 ` Chen, Zide
2026-11-09 22:07 ` Yosry Ahmed
2026-11-09 22:26 ` Chen, Zide
2026-11-06 1:39 ` [PATCH v3 05/18] KVM: x86/pmu: Drop nr_arch_{gp,fixed}_counters from kvm_pmu Zide Chen
2026-11-06 19:34 ` Yosry Ahmed
2026-11-07 0:42 ` Jim Mattson
2026-11-07 2:26 ` Yosry Ahmed
2026-11-09 22:42 ` Chen, Zide
2026-11-09 22:47 ` Chen, Zide
2026-11-06 1:39 ` [PATCH v3 06/18] KVM: x86/pmu: Expose kvm_host_pmu to vendor modules Zide Chen
2026-11-06 19:37 ` Yosry Ahmed
2026-11-06 1:39 ` [PATCH v3 07/18] perf/x86: Plumb counter bitmap from x86_pmu to x86_pmu_cap Zide Chen
2026-11-06 1:39 ` [PATCH v3 08/18] KVM: x86/pmu: Switch to bitmask-based KVM PMU capabilities Zide Chen
2026-11-06 20:05 ` Yosry Ahmed [this message]
2026-11-09 21:22 ` Chen, Zide
2026-11-09 20:50 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 09/18] perf/x86: Remove num_counters_{gp,fixed} from x86_pmu_capability Zide Chen
2026-11-06 1:39 ` [PATCH v3 10/18] KVM: x86/pmu: Document GLOBAL_STATUS_RESET passthrough erratum Zide Chen
2026-11-06 20:14 ` Yosry Ahmed
2026-11-10 0:41 ` Chen, Zide
2026-11-09 20:51 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 11/18] KVM: x86/pmu: Emulate IA32_PERF_GLOBAL_STATUS_SET MSR Zide Chen
2026-11-06 20:35 ` Yosry Ahmed
2026-11-09 23:44 ` Chen, Zide
2026-11-09 20:53 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 12/18] KVM: x86/pmu: Emulate IA32_PERF_GLOBAL_INUSE MSR Zide Chen
2026-11-09 20:54 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 13/18] KVM: x86/pmu: Populate CPUID.0AH:ECX fixed-counter bitmap Zide Chen
2026-11-06 21:00 ` Yosry Ahmed
2026-11-09 20:41 ` Chen, Zide
2026-11-10 6:28 ` Mi, Dapeng
2026-11-10 16:29 ` Chen, Zide
2026-11-10 22:56 ` Chen, Zide
2026-11-11 0:25 ` Mi, Dapeng
2026-11-11 3:28 ` Chen, Zide
2026-11-11 15:37 ` Sean Christopherson
2026-11-11 17:06 ` Chen, Zide
2026-11-12 17:09 ` Sean Christopherson
2026-11-12 17:47 ` Chen, Zide
2026-11-06 1:39 ` [PATCH v3 14/18] KVM: x86/pmu: Factor out fixed counter control bit calculation Zide Chen
2026-11-06 1:39 ` [PATCH v3 15/18] KVM: x86/pmu: Mask only OS/USR bits when filtering fixed counters Zide Chen
2026-11-06 21:19 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 16/18] KVM: x86/pmu: Ignore AnyThread bit if CPUID.0AH:EDX[15] is set Zide Chen
2026-11-09 20:56 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 17/18] KVM: x86/pmu: Advertise PerfMon version 5 on Intel hosts Zide Chen
2026-11-06 21:20 ` Jim Mattson
2026-11-06 1:39 ` [PATCH v3 18/18] KVM: selftests: Support fixed counters bitmap in pmu_counters_test Zide Chen
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