From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D11D1606A31C for ; Wed, 28 Oct 2026 15:52:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key, unprotected) header.d=arm.com header.i=@arm.com header.a=rsa-sha256 header.s=foss header.b=uqAleGlA Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3E02210E635; Wed, 28 Oct 2026 15:52:08 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 3FD2510E635 for ; Wed, 28 Oct 2026 15:52:02 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AE6A81756 for ; Wed, 28 Oct 2026 08:51:58 -0700 (PDT) Received: from [192.168.0.1] (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A19DA3F673 for ; Wed, 28 Oct 2026 08:52:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1793202721; bh=oHHZ8DhzfXs4MUGZ9+6PoZi4Xb1MrhxkebKog/hBHfw=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=uqAleGlAJVU35waDTS+u+V3LZbzVJGo7mbeLERvB4E7lRlDpE3lDR3+IOVpne8Z60 pY8AfaLw5FSj6W9QylOY34xTrco/TMhbUNm+cdQRXjtLa2/bhepz7j4zIDW8uINh79 eIVoOFKrTNesN45sc9sHI+hSnHD7ua0MamdWN9vU= Date: Wed, 28 Oct 2026 15:52:00 +0000 From: Liviu Dudau To: Karunika Choo Cc: dri-devel@lists.freedesktop.org, nd@arm.com, Boris Brezillon , Steven Price , linux-kernel@vger.kernel.org, Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Subject: Re: [PATCH v1 02/27] drm/panthor: Move register access helpers out of panthor_device.h Message-ID: References: <20260922204535.2850094-1-karunika.choo@arm.com> <20260922204535.2850094-3-karunika.choo@arm.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260922204535.2850094-3-karunika.choo@arm.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "dri-devel" X-Spam-Status: No, score=-13.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Tue, Sep 22, 2026 at 09:44:56PM +0100, Karunika Choo wrote: > Move register access helpers out of panthor_device.h to allow reuse by > other panthor drivers that will be added to enable v15 support. > > Signed-off-by: Karunika Choo Reviewed-by: Liviu Dudau Best regards, Liviu > --- > v1: > - Includes "panthor_device_io.h" directly in "panthor_device.h" instead > of peppering multiple files with the header. > > drivers/gpu/drm/panthor/panthor_device.h | 74 +----------------- > drivers/gpu/drm/panthor/panthor_device_io.h | 83 +++++++++++++++++++++ > 2 files changed, 85 insertions(+), 72 deletions(-) > create mode 100644 drivers/gpu/drm/panthor/panthor_device_io.h > > diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h > index b55a3f9edd414..54031c5252473 100644 > --- a/drivers/gpu/drm/panthor/panthor_device.h > +++ b/drivers/gpu/drm/panthor/panthor_device.h > @@ -6,7 +6,6 @@ > #ifndef __PANTHOR_DEVICE_H__ > #define __PANTHOR_DEVICE_H__ > > -#include > #include > #include > #include > @@ -19,6 +18,8 @@ > #include > #include > > +#include "panthor_device_io.h" > + > struct panthor_csf; > struct panthor_csf_ctx; > struct panthor_device; > @@ -495,77 +496,6 @@ panthor_exception_is_fault(u32 exception_code) > const char *panthor_exception_name(struct panthor_device *ptdev, > u32 exception_code); > > -static inline void gpu_write(void __iomem *iomem, u32 reg, u32 data) > -{ > - writel(data, iomem + reg); > -} > - > -static inline u32 gpu_read(void __iomem *iomem, u32 reg) > -{ > - return readl(iomem + reg); > -} > - > -static inline u32 gpu_read_relaxed(void __iomem *iomem, u32 reg) > -{ > - return readl_relaxed(iomem + reg); > -} > - > -static inline void gpu_write64(void __iomem *iomem, u32 reg, u64 data) > -{ > - gpu_write(iomem, reg, lower_32_bits(data)); > - gpu_write(iomem, reg + 4, upper_32_bits(data)); > -} > - > -static inline u64 gpu_read64(void __iomem *iomem, u32 reg) > -{ > - return (gpu_read(iomem, reg) | ((u64)gpu_read(iomem, reg + 4) << 32)); > -} > - > -static inline u64 gpu_read64_relaxed(void __iomem *iomem, u32 reg) > -{ > - return (gpu_read_relaxed(iomem, reg) | > - ((u64)gpu_read_relaxed(iomem, reg + 4) << 32)); > -} > - > -static inline u64 gpu_read64_counter(void __iomem *iomem, u32 reg) > -{ > - u32 lo, hi1, hi2; > - do { > - hi1 = gpu_read(iomem, reg + 4); > - lo = gpu_read(iomem, reg); > - hi2 = gpu_read(iomem, reg + 4); > - } while (hi1 != hi2); > - return lo | ((u64)hi2 << 32); > -} > - > -#define gpu_read_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ > - read_poll_timeout(gpu_read, val, cond, delay_us, timeout_us, false, \ > - iomem, reg) > - > -#define gpu_read_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > - timeout_us) \ > - read_poll_timeout_atomic(gpu_read, val, cond, delay_us, timeout_us, \ > - false, iomem, reg) > - > -#define gpu_read64_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ > - read_poll_timeout(gpu_read64, val, cond, delay_us, timeout_us, false, \ > - iomem, reg) > - > -#define gpu_read64_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > - timeout_us) \ > - read_poll_timeout_atomic(gpu_read64, val, cond, delay_us, timeout_us, \ > - false, iomem, reg) > - > -#define gpu_read_relaxed_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > - timeout_us) \ > - read_poll_timeout_atomic(gpu_read_relaxed, val, cond, delay_us, \ > - timeout_us, false, iomem, reg) > - > -#define gpu_read64_relaxed_poll_timeout(iomem, reg, val, cond, delay_us, \ > - timeout_us) \ > - read_poll_timeout(gpu_read64_relaxed, val, cond, delay_us, timeout_us, \ > - false, iomem, reg) > - > #define INT_RAWSTAT 0x0 > #define INT_CLEAR 0x4 > #define INT_MASK 0x8 > diff --git a/drivers/gpu/drm/panthor/panthor_device_io.h b/drivers/gpu/drm/panthor/panthor_device_io.h > new file mode 100644 > index 0000000000000..2287a0d9f86c2 > --- /dev/null > +++ b/drivers/gpu/drm/panthor/panthor_device_io.h > @@ -0,0 +1,83 @@ > +/* SPDX-License-Identifier: GPL-2.0 or MIT */ > +/* Copyright 2026 ARM Limited. All rights reserved. */ > + > +#ifndef __PANTHOR_DEVICE_IO_H__ > +#define __PANTHOR_DEVICE_IO_H__ > + > +#include > +#include > + > + > +static inline void gpu_write(void __iomem *iomem, u32 reg, u32 data) > +{ > + writel(data, iomem + reg); > +} > + > +static inline u32 gpu_read(void __iomem *iomem, u32 reg) > +{ > + return readl(iomem + reg); > +} > + > +static inline u32 gpu_read_relaxed(void __iomem *iomem, u32 reg) > +{ > + return readl_relaxed(iomem + reg); > +} > + > +static inline void gpu_write64(void __iomem *iomem, u32 reg, u64 data) > +{ > + gpu_write(iomem, reg, lower_32_bits(data)); > + gpu_write(iomem, reg + 4, upper_32_bits(data)); > +} > + > +static inline u64 gpu_read64(void __iomem *iomem, u32 reg) > +{ > + return (gpu_read(iomem, reg) | ((u64)gpu_read(iomem, reg + 4) << 32)); > +} > + > +static inline u64 gpu_read64_relaxed(void __iomem *iomem, u32 reg) > +{ > + return (gpu_read_relaxed(iomem, reg) | > + ((u64)gpu_read_relaxed(iomem, reg + 4) << 32)); > +} > + > +static inline u64 gpu_read64_counter(void __iomem *iomem, u32 reg) > +{ > + u32 lo, hi1, hi2; > + do { > + hi1 = gpu_read(iomem, reg + 4); > + lo = gpu_read(iomem, reg); > + hi2 = gpu_read(iomem, reg + 4); > + } while (hi1 != hi2); > + return lo | ((u64)hi2 << 32); > +} > + > +#define gpu_read_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ > + read_poll_timeout(gpu_read, val, cond, delay_us, timeout_us, false, \ > + iomem, reg) > + > +#define gpu_read_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > + timeout_us) \ > + read_poll_timeout_atomic(gpu_read, val, cond, delay_us, timeout_us, \ > + false, iomem, reg) > + > +#define gpu_read64_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us) \ > + read_poll_timeout(gpu_read64, val, cond, delay_us, timeout_us, false, \ > + iomem, reg) > + > +#define gpu_read64_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > + timeout_us) \ > + read_poll_timeout_atomic(gpu_read64, val, cond, delay_us, timeout_us, \ > + false, iomem, reg) > + > +#define gpu_read_relaxed_poll_timeout_atomic(iomem, reg, val, cond, delay_us, \ > + timeout_us) \ > + read_poll_timeout_atomic(gpu_read_relaxed, val, cond, delay_us, \ > + timeout_us, false, iomem, reg) > + > +#define gpu_read64_relaxed_poll_timeout(iomem, reg, val, cond, delay_us, \ > + timeout_us) \ > + read_poll_timeout(gpu_read64_relaxed, val, cond, delay_us, timeout_us, \ > + false, iomem, reg) > + > + > +#endif /* __PANTHOR_DEVICE_IO_H__ */ > -- > 2.43.0 > -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯