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[93.144.6.81]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4aa813d295csm136475475e9.7.2026.10.30.05.32.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Oct 2026 05:32:38 -0700 (PDT) Date: Fri, 30 Oct 2026 13:32:37 +0100 From: Lorenzo Bianconi To: Maxime Chevallier Cc: Andrew Lunn , Jakub Kicinski , davem@davemloft.net, Eric Dumazet , Paolo Abeni , Simon Horman , Maxime Coquelin , Alexandre Torgue , Russell King , Ovidiu Panait , thomas.petazzoni@bootlin.com, Alexis =?iso-8859-1?Q?Lothor=E9?= , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH net] net: stmmac: Clear DMA errors for multi-channel interrupts Message-ID: References: <20261030102251.208929-1-maxime.chevallier@bootlin.com> X-Mailing-List: netdev@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="MiK4MvEZXEgqTADb" Content-Disposition: inline In-Reply-To: <20261030102251.208929-1-maxime.chevallier@bootlin.com> X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDMwMDA0OSBTYWx0ZWRfXw/J4X1m4ncTX mXNZ6UDvjinZrC87CRZHLVnKATnSeJP49gHTaBNzCyXywKvidWCUqPzFAiCRnrjiyztw6aePwIV Oo+pWF3rbkpScw1gYfd39um7CakMWVldmO0FNvEArdc/wKJU18994pjInIu1vT/UMJhIQ25QWjE o0ZBn1km64Zf4faOuSZFP2HROO+IEvjJQ42qe/te5O/8of22wsh2rIDCZ3cy89syGgD3sqWF9j6 bL81WGdUSS9N+nkH7JkcitjDKXCLn0/tVNKdkmjnTDzTrtuGU3jV6UHBbo/Xno9GDb71Wioccar QTtJyv+6oWz2/mca9CqnKK4PlIJc7T9AdXt51EidYzn1HDIwg5vP87wFGgkKV7z9hs7MD9ZpF6R fiFwvU9RkORyWNQGeZ97HOj5yksbVzTZ+QJHuY2EWX90wEV1ByIsqwLvL6u1VPw3Voj/uTXn7um eDDm2D0D6w6Cuw8v9MA== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDMwMDA0OSBTYWx0ZWRfX7UpTRr4f4wXv 54oszRxFNvEvjsi6cxU7yXoJ4TWFJmExQIuMCRoP/snMTmf+jbkrFMq0KItH0fXc/EAl/wV/zcK WaDvVDULBH9LK9nTrMJpqLwFRN8BYiM= X-Proofpoint-ORIG-GUID: uldj8c90oWvhGEnb7LK3-d7RfSIHHw4O X-Proofpoint-GUID: uldj8c90oWvhGEnb7LK3-d7RfSIHHw4O X-Authority-Analysis: v=2.4 cv=TL3Q2Fla c=1 sm=1 tr=0 ts=6ae48e68 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=7fYLNvKHbgS61GKHX+yayQ==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=P-IC7800AAAA:8 a=EUspDBNiAAAA:8 a=TdYLlOzfE9KcRv6nyNQA:9 a=CjuIK1q_8ugA:10 a=4nU4Df6lw9LS-X-cepgA:9 a=PEH46H7Ffwr30OY-TuGO:22 a=d3PnA9EDa4IxuAV0gXij:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-30_04,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1015 adultscore=0 bulkscore=0 malwarescore=0 phishscore=0 suspectscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610300049 --MiK4MvEZXEgqTADb Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable > The Multi-MSI interrupt handler doesn't clear the DMA error interrupts, > and this leads to interrupt storms when one of these interrupts starts > firing : >=20 > - The RBU (rx buff unav) which triggers under high traffic load >=20 > This triggers easily with iperf3 and small udp packets, and shows > when running the netpoll kselftest >=20 > - The RPS (rx process stop) which triggers when we stop the DMA RX. >=20 > This one shows when restarting the RX logic without doing a down/up > cycle, like when attaching an XDP program. The XSK kselftests > triggers it. >=20 > Let's make sure we clear these interrupts for multi-MSI cases. It's > already properly done for the single-chan interrupt, and for that > introduce an "ERR" DMA dir, as we don't want to touch the RI/TI bits > when handling these interrupts. >=20 > To avoid duplication, the DMA TX error handling is factored out in a > dedicated helper (in the same commit to ease backporting). >=20 > Both of the above storms have been found on dwmac-motorcomm (YT8601), > and are triggered by the xdp.py, xsk_reconfig.py, xdp_features.py, > ring_reconfig.py and netpoll_basic kernel selftests. >=20 > This seems to only affect dwmac4, there's no multi-msi mode on > dwmac1000, and on dwxgmac these interrupts are masked as of today. >=20 > Fixes: 6ccf12ae111e ("net: stmmac: use interrupt mode INTM=3D1 for multi-= MSI") > Signed-off-by: Maxime Chevallier Reviewed-by: Lorenzo Bianconi > --- > drivers/net/ethernet/stmicro/stmmac/common.h | 1 + > .../net/ethernet/stmicro/stmmac/dwmac4_dma.h | 5 ++ > .../net/ethernet/stmicro/stmmac/dwmac4_lib.c | 2 + > .../net/ethernet/stmicro/stmmac/stmmac_main.c | 46 +++++++++++++------ > 4 files changed, 40 insertions(+), 14 deletions(-) >=20 > diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/e= thernet/stmicro/stmmac/common.h > index c74bc7c9750e..a972bee66504 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/common.h > +++ b/drivers/net/ethernet/stmicro/stmmac/common.h > @@ -382,6 +382,7 @@ enum dma_irq_dir { > DMA_DIR_RX =3D 0x1, > DMA_DIR_TX =3D 0x2, > DMA_DIR_RXTX =3D 0x3, > + DMA_DIR_ERR =3D 0x4, > }; > =20 > enum request_irq_err { > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h b/drivers/n= et/ethernet/stmicro/stmmac/dwmac4_dma.h > index 43b036d4e95b..a7caac3c98e6 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h > @@ -173,6 +173,11 @@ static inline u32 dma_chanx_base_addr(const struct d= wmac4_addrs *addrs, > DMA_CHAN_STATUS_TI | \ > DMA_CHAN_STATUS_MSK_COMMON) > =20 > +#define DMA_CHAN_STATUS_MSK_ERR (DMA_CHAN_STATUS_AIS | \ > + DMA_CHAN_STATUS_FBE | \ > + DMA_CHAN_STATUS_RPS | \ > + DMA_CHAN_STATUS_RBU) > + > int dwmac4_dma_reset(void __iomem *ioaddr); > void dwmac4_enable_dma_irq(struct stmmac_priv *priv, void __iomem *ioadd= r, > u32 chan, bool rx, bool tx); > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/drivers/n= et/ethernet/stmicro/stmmac/dwmac4_lib.c > index a0249715fafa..02aa1a3dd1e2 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c > @@ -150,6 +150,8 @@ int dwmac4_dma_interrupt(struct stmmac_priv *priv, vo= id __iomem *ioaddr, > intr_status &=3D DMA_CHAN_STATUS_MSK_RX; > else if (dir =3D=3D DMA_DIR_TX) > intr_status &=3D DMA_CHAN_STATUS_MSK_TX; > + else if (dir =3D=3D DMA_DIR_ERR) > + intr_status &=3D DMA_CHAN_STATUS_MSK_ERR; > =20 > /* ABNORMAL interrupts */ > if (unlikely(intr_status & DMA_CHAN_STATUS_AIS)) { > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/= net/ethernet/stmicro/stmmac/stmmac_main.c > index 9ded31150fbe..2068b57df8d5 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c > @@ -3141,6 +3141,16 @@ static int stmmac_napi_check(struct stmmac_priv *p= riv, u32 chan, u32 dir) > return status; > } > =20 > +static void stmmac_dma_tx_error(struct stmmac_priv *priv, u32 chan, int = status) > +{ > + if (unlikely(status & tx_hard_error_bump_tc)) { > + /* Try to bump up the dma threshold on this failure */ > + stmmac_bump_dma_threshold(priv, chan); > + } else if (unlikely(status =3D=3D tx_hard_error)) { > + stmmac_tx_err(priv, chan); > + } > +} > + > /** > * stmmac_dma_interrupt - DMA ISR > * @priv: driver private structure > @@ -3165,13 +3175,24 @@ static void stmmac_dma_interrupt(struct stmmac_pr= iv *priv) > status[chan] =3D stmmac_napi_check(priv, chan, > DMA_DIR_RXTX); > =20 > - for (chan =3D 0; chan < tx_channel_count; chan++) { > - if (unlikely(status[chan] & tx_hard_error_bump_tc)) { > - /* Try to bump up the dma threshold on this failure */ > - stmmac_bump_dma_threshold(priv, chan); > - } else if (unlikely(status[chan] =3D=3D tx_hard_error)) { > - stmmac_tx_err(priv, chan); > - } > + for (chan =3D 0; chan < tx_channel_count; chan++) > + stmmac_dma_tx_error(priv, chan, status[chan]); > +} > + > +static void stmmac_dma_err_interrupt(struct stmmac_priv *priv) > +{ > + u8 tx_channel_count =3D priv->plat->tx_queues_to_use; > + u8 channels_to_check =3D max(priv->plat->rx_queues_to_use, > + tx_channel_count); > + int status; > + u8 chan; > + > + for (chan =3D 0; chan < channels_to_check; chan++) { > + status =3D stmmac_dma_interrupt_status(priv, priv->ioaddr, > + &priv->xstats, chan, > + DMA_DIR_ERR); > + if (chan < tx_channel_count) > + stmmac_dma_tx_error(priv, chan, status); > } > } > =20 > @@ -6466,6 +6487,9 @@ static irqreturn_t stmmac_mac_interrupt(int irq, vo= id *dev_id) > /* To handle Common interrupts */ > stmmac_common_interrupt(priv); > =20 > + if (priv->plat->core_type =3D=3D DWMAC_CORE_GMAC4) > + stmmac_dma_err_interrupt(priv); > + > return IRQ_HANDLED; > } > =20 > @@ -6500,13 +6524,7 @@ static irqreturn_t stmmac_msi_intr_tx(int irq, voi= d *data) > return IRQ_HANDLED; > =20 > status =3D stmmac_napi_check(priv, chan, DMA_DIR_TX); > - > - if (unlikely(status & tx_hard_error_bump_tc)) { > - /* Try to bump up the dma threshold on this failure */ > - stmmac_bump_dma_threshold(priv, chan); > - } else if (unlikely(status =3D=3D tx_hard_error)) { > - stmmac_tx_err(priv, chan); > - } > + stmmac_dma_tx_error(priv, chan, status); > =20 > return IRQ_HANDLED; > } > --=20 > 2.56.0 >=20 --MiK4MvEZXEgqTADb Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQTquNwa3Txd3rGGn7Y6cBh0uS2trAUCauSOZQAKCRA6cBh0uS2t rLt2AP94/xq3HXI972oCxjUn64hJJfAqS/VqduknEbpg04vgCQEAoFB4EmEfJdaY 5GXrYPGGorHqDH29hb7XSJ6BbhpAnQI= =yMqN -----END PGP SIGNATURE----- --MiK4MvEZXEgqTADb--