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From: Yao Zi <me@ziyao.cc>
To: Thomas Perrot <thomas.perrot@bootlin.com>, u-boot@lists.denx.de
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>,
	Tom Rini <trini@konsulko.com>, Yao Zi <me@ziyao.cc>,
	Conor Dooley <conor.dooley@microchip.com>,
	Jamie Gibbons <jamie.gibbons@microchip.com>
Subject: Re: [PATCH 0/3] riscv: Add support for the BeagleBoard.org BeagleV-Ahead
Date: Tue, 3 Nov 2026 13:30:45 +0000	[thread overview]
Message-ID: <auniBY7vN13FsebY@pie> (raw)
In-Reply-To: <20261017-dev-tprrt-beaglev-ahead-spl-v1-0-f9dfdff50f59@bootlin.com>

On Sat, Oct 17, 2026 at 07:41:20PM +0200, Thomas Perrot wrote:
> This series adds support for the BeagleBoard.org BeagleV-Ahead, a single
> board computer built around the T-Head TH1520 SoC (4x Xuantie C910) with
> 4 GB of LPDDR4X and 16 GB of eMMC.
> 
> Most of the work is already upstream: the TH1520 SoC support added for the
> Lichee Pi 4A (SPL, DDR controller, clock and pinctrl drivers, binman FIT
> generation) and the BeagleV-Ahead devicetree, which is available through
> OF_UPSTREAM. The board therefore only needs a small board directory, a
> U-Boot specific devicetree include and a defconfig.
> 
> The one missing piece is in the DDR controller driver, which only accepts
> the dual rank firmware and fails with -EINVAL on the BeagleV-Ahead. The
> first patch makes it program the rank configuration and the address map
> from the number of ranks described by the firmware.
> 
> As on the Lichee Pi 4A, u-boot-with-spl.bin contains the SPL, the DDR
> firmware, OpenSBI and U-Boot proper, and is loaded into SRAM through
> fastboot.
> 
> The BeagleV-Ahead has a single rank of LPDDR4X, so the DDR firmware has to
> be generated from lpddr4x-3733-singlerank.lua, which is already provided by
> https://github.com/ziyao233/th1520-firmware, instead of the dual rank
> configuration used by the Lichee Pi 4A. This is described in the
> documentation added by the third patch.
> 
> Testing: the series builds with the Bootlin riscv64 glibc toolchain
> (2026.08-1) together with OpenSBI v1.9, and produces a u-boot-with-spl.bin
> holding the SPL, the DDR firmware and the FIT image.
> 
> The image was loaded into SRAM through the BROM fastboot interface on a
> BeagleV-Ahead. Without the first patch the SPL stops with "failed to
> initialize DDR controller: -22". With it, the DDR is initialized with the
> single rank firmware, OpenSBI and U-Boot proper start, and the console
> reports "Model: BeagleV Ahead", "DRAM:  4 GiB", both MMC controllers and
> the Ethernet device. The Ethernet link, the eMMC and microSD accesses and
> writing U-Boot to the eMMC were not tested. The dual rank behavior is
> unchanged by the first patch, but I could not test it on a Lichee Pi 4A.
> 
> Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>

lists.denx.de has been down for some time, and U-Boot has switched
to u-boot@lists.u-boot-project.org for development, please update your
Git tree.

Please re-send the series to the available address, so there's a public
copy available to everyone, and I'll continue to review, thanks for your
patch.

Regards,
Yao Zi


           reply	other threads:[~2026-11-03 13:31 UTC|newest]

Thread overview: expand[flat|nested]  mbox.gz  Atom feed
 [parent not found: <20261017-dev-tprrt-beaglev-ahead-spl-v1-0-f9dfdff50f59@bootlin.com>]

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