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Tue, 3 Nov 2026 19:59:20 -0800 (PST) Date: Wed, 4 Nov 2026 03:59:13 +0000 From: Yao Zi To: =?iso-8859-1?Q?Jo=E3o_Paulo_Gon=E7alves?= , Hiago De Franco Cc: u-boot@lists.u-boot-project.org, Yao Zi , Tom Rini , Simon Glass , Alper Nebi Yasak , Marek Vasut , Tim Ouyang , Leo Liang , Kongyang Liu , Neha Malcom Francis , Bin Liu , Quentin Schulz , Andrei Lalaev , Zhuxu Ran , Udit Kumar Subject: Re: [PATCH 6/8] board: sophgo: milkv_duo: enable RTC power and reset Message-ID: References: <20261021-milkv-duo-spl-v1-0-ee7618860237@baylibre.com> <20261021-milkv-duo-spl-v1-6-ee7618860237@baylibre.com> X-Archived-By: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Zoho-Virus-Status: 1 X-Zoho-AV-Stamp: zmail-av-0.2.13.1.5.4/293.744.82 X-ZohoMailClient: External X-BeenThere: u-boot@lists.u-boot-project.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: U-Boot discussion List-Archive: List-Post: List-Help: List-Subscribe: , X-Spam-Status: No, score=-18.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_PASS autolearn=ham autolearn_force=no version=4.0.1 X-Spam-Checker-Version: SpamAssassin 4.0.1 (2024-03-26) on aws-us-west-2-korg-listserv-alma10-1 On Tue, Nov 03, 2026 at 02:31:51PM -0300, João Paulo Gonçalves wrote: > On Wed, Oct 21, 2026 at 09:54:22AM -0300, Hiago De Franco wrote: > > Let the RTC power domain handle shutdown, warm reset, power-cycle and > > watchdog reset requests, and stop the board from powering back on by > > itself after a power off. > > > > Without this, the reset and poweroff paths are left in their BootROM > > defaults, which do not match what the vendor FSBL configures. > > > > Signed-off-by: Hiago De Franco > > --- > > board/sophgo/milkv_duo/spl.c | 53 +++++++++++++++++++++++++++++++++++++++++++- > > 1 file changed, 52 insertions(+), 1 deletion(-) > > > > diff --git a/board/sophgo/milkv_duo/spl.c b/board/sophgo/milkv_duo/spl.c > > index 8b2dc2756ae..97681e5a61b 100644 > > --- a/board/sophgo/milkv_duo/spl.c > > +++ b/board/sophgo/milkv_duo/spl.c > > @@ -2,7 +2,7 @@ > > /* > > * Copyright (c) 2026, Hiago De Franco > > * > > - * PLL setup based on the Sophgo FSBL (https://github.com/sophgo/fsbl), > > + * PLL and RTC setup based on the Sophgo FSBL (https://github.com/sophgo/fsbl), > > * plat/cv180x/platform.c. > > */ > > > > @@ -13,7 +13,9 @@ > > #include > > #include > > #include > > +#include > > #include > > +#include > > #include > > #include > > > > @@ -52,6 +54,25 @@ > > #define CLK_DIV(div, src) (((div) << 16) | ((src) << 8) | BIT(3) | BIT(0)) > > #define clkgen_reg(off) ((void __iomem *)(CLKGEN_BASE + (off))) > > > > +#define RTC_BASE 0x05026000UL > > +#define RTC_EN_SHDN_REQ 0x0c0 > > +#define RTC_EN_PWR_CYC_REQ 0x0c8 > > +#define RTC_EN_WARM_RST_REQ 0x0cc > > +#define RTC_EN_PWR_VBAT_DET 0x0d0 > > +#define RTC_EN_PWR_VBAT_DET_PWR_UP BIT(2) > > +#define RTC_EN_WDT_RST_REQ 0x0e0 > > +#define RTC_CTRL_BASE 0x05025000UL > > +#define RTC_CTRL0_UNLOCKKEY 0x004 > > +#define RTC_CTRL0_UNLOCKKEY_VAL 0xab18 > > +#define RTC_CTRL0 0x008 > > +#define RTC_CTRL0_WRITE_MASK GENMASK(31, 16) > > +#define RTC_CTRL0_HW_WDG_RST_EN BIT(11) > > +#define RTC_POR_RST_CTRL 0x0ac > > +#define RTC_EN_REQ_TIMEOUT_US 100000 > > + > > +#define rtc_reg(off) ((void __iomem *)(RTC_BASE + (off))) > > +#define rtc_ctrl_reg(off) ((void __iomem *)(RTC_CTRL_BASE + (off))) > > Instead of hardcoding the bases here, could we get them from the DT? The > upstream cv18xx.dtsi already has the RTC node (rtc@5025000, with > "syscon" in its compatible), and its range covers both RTC_CTRL_BASE and > RTC_BASE. Also, use syscon/regmap in SPL (CONFIG_SPL_SYSCON and > CONFIG_SPL_REGMAP) to read/write the registers. > > Just a suggestion though, I'll leave it to the maintainers to decide. I'll second the idea of handling RTC stuff in its driver, and I think it doesn't even need being configured at the SPL stage, right? ... > Best regards, > João Paulo Gonçalves Regards, Yao Zi