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[35.189.192.250]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4967003fefbsm5468334f8f.13.2026.11.09.04.01.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Nov 2026 04:01:55 -0800 (PST) Date: Mon, 9 Nov 2026 12:01:48 +0000 From: Mostafa Saleh To: Nicolin Chen Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, iommu@lists.linux.dev, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, joro@8bytes.org, jgg@ziepe.ca, mark.rutland@arm.com, qperret@google.com, tabba@google.com, vdonnefort@google.com Subject: Re: [PATCH v9 17/25] iommu/arm-smmu-v3-kvm: Shadow stream table Message-ID: References: <20261015200903.2735565-1-smostafa@google.com> <20261015200903.2735565-18-smostafa@google.com> X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Fri, Nov 06, 2026 at 11:45:19AM -0800, Nicolin Chen wrote: > On Thu, Oct 15, 2026 at 08:08:48PM +0000, Mostafa Saleh wrote: > > @@ -538,6 +655,7 @@ static bool smmu_dabt_device(struct hyp_arm_smmu_v3_device *smmu, > > > > if (is_write) { > > bool last_cmdq_en = is_cmdq_enabled(smmu); > > + bool last_smmu_en = is_smmu_enabled(smmu); > > It'd read better with smmu_was_enabled and smmu_is_enabled. > Sure, will update them. > > diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3-hyp.h b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3-hyp.h > > index 3903ae358555..31ab7a0335a8 100644 > > --- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3-hyp.h > > +++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3-hyp.h > > @@ -27,6 +27,12 @@ > > * @cmdq_host: Host view of the CMDQ, only q_base, base_dma and llq used > > * @cmdq_max_shift: Max shift for the CMDQ probed from HW > > * @cr0: Last value of CR0 > > + * @host_ste_cfg: Host stream table config > > + * @host_ste_base: Host stream table base > > + * @strtab_cfg: Stream table config as seen by HW > > + * @strtab_dma: Physical address of the shadow stream table > > + * @strtab_size: Size of the shadow stream table > > + * > > * @mmio_addr, @mmio_size and ARM_SMMU_FEAT_COHERENCY are filled by the host > > * before de-privilege, the rest by the hypervisor driver. > > */ > > @@ -50,6 +56,11 @@ struct hyp_arm_smmu_v3_device { > > struct arm_smmu_queue cmdq_host; > > u32 cmdq_max_shift; > > u32 cr0; > > + dma_addr_t strtab_dma; > > + size_t strtab_size; > > + u64 host_ste_cfg; > > + u64 host_ste_base; > > + struct arm_smmu_strtab_cfg strtab_cfg; > > The order is different here than the kdocs. > > Also, it might be cleaner to group host/shadow/hw stuff separately: > > struct hyp_arm_smmu_v3_device { > ... > struct hyp_arm_smmu_v3_device_host host; > struct hyp_arm_smmu_v3_device_shadow shadow; > struct hyp_arm_smmu_v3_device_hw hw; > // Or > struct { > ... > } shadow; > struct { > ... > } host; > struct { > ... > } hw; > ... > }; That looks better, thanks! I will try it in the next version. Thanks, Mostafa > > Nicolin