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Thu, 12 Nov 2026 09:45:12 +0000 Date: Thu, 12 Nov 2026 17:50:08 +0800 From: Peng Fan To: sashiko-reviews@lists.linux.dev Cc: imx@lists.linux.dev, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org, vkoul@kernel.org, Frank.Li@kernel.org Subject: Re: [PATCH v6 6/9] dmaengine: fsl-edma: use BIT_ULL for 64-bit channel mask Message-ID: References: <20261112-edma-iommu-v3-v6-0-b038edb8ce6f@nxp.com> <20261112-edma-iommu-v3-v6-6-b038edb8ce6f@nxp.com> Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-ClientProxiedBy: SG2P153CA0026.APCP153.PROD.OUTLOOK.COM (2603:1096:4:c7::13) To AM8PR04MB7874.eurprd04.prod.outlook.com (2603:10a6:20b:24d::9) X-Mailing-List: imx@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM8PR04MB7874:EE_|PA1PR04MB10180:EE_ X-MS-Office365-Filtering-Correlation-Id: 4f051fee-1d7a-4317-cd15-08df40a1a574 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|376014|366016|1800799024|19092799006|10067099003|11063799006|4143699003|56012099006|261022105027099003|261022075727099003|261009223027099003|261028144727099003|261026121527099003|261026140227099003|18002099003|22082099003; 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Sashiko AI review found 1 potential >issue to consider: >- [Low] dmaengine: fsl-edma: missing Fixes trailer for chan_masked > BIT_ULL() fix >-- > >commit 8e06ee65c51430e49223083e2d47b18afdf396c8 >Author: Peng Fan > >> dmaengine: fsl-edma: use BIT_ULL for 64-bit channel mask >> >> chan_masked is a u64 bitmap, but several checks use BIT(), which uses >> unsigned long and overflows on 32-bit architectures for channels >= 32. >> Use BIT_ULL() so the upper channels are tested correctly. >> >> Signed-off-by: Peng Fan > >[Severity: Low] >Should this commit include a Fixes: tag for the commit that introduced the >64-bit chan_masked bitmap and the initial BIT() checks (and optionally the >follow-up commits that added the remaining checks)? No need fix tag. Until now, we not have 32-architecture with more than 32 channels. There might be cases to run ARM64 platform in ARM32 mode as we ever did for i.MX8MM, but we have not seen the case for i.MX8ULP/9, so no need a fix tag. Regards Peng > > Fixes: 72f5801a4e2b ("dmaengine: fsl-edma: integrate v3 support") > Fixes: 2838a897654c ("dmaengine: fsl-edma: Do not suspend and resume the masked dma channel when the system is sleeping") > Fixes: ccfa3131d4a0 ("dmaengine: fsl-edma: implement the cleanup path of fsl_edma3_attach_pd()") > Fixes: d175222f5e90 ("dmaegnine: fsl-edma: add edma error interrupt handler") > >-- >Sashiko AI review · https://sashiko.dev/#/patchset/20261112-edma-iommu-v3-v6-0-b038edb8ce6f@nxp.com?part=6 > >