From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Carlo Caione <ccaione@baylibre.com>
Cc: "Stephen Boyd" <sboyd@kernel.org>,
"Brian Masney" <bmasney+clk@redhat.com>,
"Jerome Brunet" <jbrunet+clk@baylibre.com>,
"Brian Norris" <computersforpeace@gmail.com>,
"Maxime Coquelin" <maxime.coquelin@st.com>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Michael Turquette" <mturquette@linaro.org>,
"Stephen Boyd" <sboyd@codeaurora.org>,
"David Laight" <david.laight.linux@gmail.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/3] clk: divider: Fix round-closest for rates above the parent rate
Date: Thu, 12 Nov 2026 16:41:49 +0100 [thread overview]
Message-ID: <avXdsS-uYDyTLjVF@venus> (raw)
In-Reply-To: <20261112-upstream-clk-divider-large-rates-v2-2-18f3bb888b0c@baylibre.com>
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Hi,
On Thu, Nov 12, 2026 at 10:37:00AM +0100, Carlo Caione wrote:
> When the requested rate is above the parent rate, _div_round_closest()
> computes a down divider of 0 and divides the parent rate by it. Asking a
> CLK_DIVIDER_ROUND_CLOSEST divider without CLK_SET_RATE_PARENT for its
> maximum rate with clk_round_rate(clk, ULONG_MAX) then traps on x86.
>
> No divider goes above the parent rate, so the smallest one is the
> closest. Return it before dividing.
>
> Fixes: 26bac95aa88c ("clk: divider: fix selection of divider when rounding to closest")
> Signed-off-by: Carlo Caione <ccaione@baylibre.com>
> ---
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Greetings,
-- Sebastian
> drivers/clk/clk-divider.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
> index c3f46f9ee451..ed60fa9b04fa 100644
> --- a/drivers/clk/clk-divider.c
> +++ b/drivers/clk/clk-divider.c
> @@ -254,6 +254,11 @@ static int _div_round_closest(const struct clk_div_table *table,
> int up, down;
> unsigned long up_rate, down_rate;
>
> + /* No divider goes above the parent rate: the smallest one is the closest */
> + if (rate >= parent_rate)
> + return table && !(flags & CLK_DIVIDER_POWER_OF_TWO) ?
> + _get_table_mindiv(table) : 1;
> +
> up = _get_div_round_up(parent_rate, rate);
> down = parent_rate / rate;
>
>
> --
> 2.56.0
>
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next prev parent reply other threads:[~2026-11-12 15:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-12 9:36 [PATCH v2 0/3] Fix clk-divider rates above 4.29 GHz on 64-bit Carlo Caione
2026-11-12 9:36 ` [PATCH v2 1/3] clk: divider: Fix the divisor for rates above 4.29 GHz Carlo Caione
2026-11-12 15:09 ` Brian Masney
2026-11-12 15:29 ` Carlo Caione
2026-11-12 15:38 ` Sebastian Reichel
2026-11-12 15:34 ` Sebastian Reichel
2026-11-12 9:37 ` [PATCH v2 2/3] clk: divider: Fix round-closest for rates above the parent rate Carlo Caione
2026-11-12 15:41 ` Sebastian Reichel [this message]
2026-11-12 9:37 ` [PATCH v2 3/3] clk: divider: test: Add tests for rates above 4.29 GHz Carlo Caione
2026-11-12 9:50 ` sashiko-bot
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