From: "Doru Blânzeanu" <dblanzeanu@linux.microsoft.com>
To: Aastha Rawat <aastharawat@linux.microsoft.com>
Cc: qemu-devel@nongnu.org,
"Magnus Kulke" <magnuskulke@linux.microsoft.com>,
"Wei Liu" <wei.liu@kernel.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Daniel P. Berrangé" <berrange@redhat.com>,
"Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Anirudh Rayabharam" <anirudh@anirudhrb.com>,
qemu-arm@nongnu.org, "Alexander Graf" <agraf@csgraf.de>,
"Pedro Barbuda" <pbarbuda@microsoft.com>,
"Mohamed Mediouni" <mohamed@unpredictable.fr>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
Subject: Re: [PATCH v6 03/14] accel/mshv: make MSHV migration initialization arch-specific
Date: Fri, 13 Nov 2026 13:37:30 +0200 [thread overview]
Message-ID: <avb2etJ16sVs3QIk@linux.microsoft.com> (raw)
In-Reply-To: <20261001-mshv_accel_arm64_supp-v6-3-aefe5e76a0e3@linux.microsoft.com>
On Thu, Oct 01, 2026 at 10:52:48AM +0000, Aastha Rawat wrote:
> x86 specific migration handlers currently live in common MSHV code. Move
> these handlers into x86 backend and add a generic architecture migration
> initialization hook. ARM MSHV live migration support is not added yet,
> this will allow ARM to add an empty initialization hook.
>
> Signed-off-by: Aastha Rawat <aastharawat@linux.microsoft.com>
> ---
> accel/mshv/mshv-all.c | 35 ++++-------------------------------
> include/system/mshv_int.h | 1 +
> target/i386/mshv/mshv-all.c | 34 ++++++++++++++++++++++++++++++++++
> 3 files changed, 39 insertions(+), 31 deletions(-)
>
> diff --git a/accel/mshv/mshv-all.c b/accel/mshv/mshv-all.c
> index 860f511fcba..efe19a39140 100644
> --- a/accel/mshv/mshv-all.c
> +++ b/accel/mshv/mshv-all.c
> @@ -60,30 +60,6 @@ static int init_mshv(int *mshv_fd)
> return 0;
> }
>
> -static int mshv_load_cleanup(void *opaque)
> -{
> - CPUState *cpu;
> - int ret;
> -
> - ret = mshv_arch_set_partition_msrs(first_cpu);
> - if (ret < 0) {
> - error_report("Failed to set partition MSRs: %s", strerror(-ret));
> - return -1;
> - }
> -
> - CPU_FOREACH(cpu) {
> - ret = mshv_arch_set_mp_state(cpu);
> - if (ret < 0) {
> - error_report("Failed to set mp state for vCPU %d: %s",
> - cpu->cpu_index, strerror(-ret));
> - return -1;
> - }
> - }
> -
> - return 0;
> -}
> -
> -
> static int get_host_partition_property(int mshv_fd, uint32_t property_code,
> uint64_t *value)
> {
> @@ -519,10 +495,6 @@ static int mshv_init_vcpu(CPUState *cpu)
> return 0;
> }
>
> -static SaveVMHandlers savevm_mshv = {
> - .load_cleanup = mshv_load_cleanup,
> -};
> -
> static int mshv_init(AccelState *as, MachineState *ms)
> {
> MshvState *s;
> @@ -574,9 +546,10 @@ static int mshv_init(AccelState *as, MachineState *ms)
> 0, "mshv-memory");
> memory_listener_register(&mshv_io_listener, &address_space_io);
>
> - register_savevm_live("mshv", 0, 1, &savevm_mshv, s);
> -
> - mshv_clock_init();
> + ret = mshv_arch_migration_init(s);
> + if (ret < 0) {
> + return ret;
> + }
>
> return 0;
> }
> diff --git a/include/system/mshv_int.h b/include/system/mshv_int.h
> index 0e68365c63f..31d2f4381c7 100644
> --- a/include/system/mshv_int.h
> +++ b/include/system/mshv_int.h
> @@ -109,6 +109,7 @@ void mshv_arch_disable_partition_proc_features(
> int mshv_arch_accel_init(AccelState *as, MachineState *ms, int mshv_fd);
> int mshv_arch_post_init_vm(int vm_fd);
> void mshv_setup_hvcall_args(AccelCPUState *state);
> +int mshv_arch_migration_init(MshvState *s);
> int mshv_get_vp_state(int cpu_fd, struct mshv_get_set_vp_state *state);
> int mshv_set_vp_state(int cpu_fd, const struct mshv_get_set_vp_state *state);
> typedef struct mshv_root_hvcall mshv_root_hvcall;
> diff --git a/target/i386/mshv/mshv-all.c b/target/i386/mshv/mshv-all.c
> index f0b43aa86f1..968fe2a4494 100644
> --- a/target/i386/mshv/mshv-all.c
> +++ b/target/i386/mshv/mshv-all.c
> @@ -78,3 +78,37 @@ int mshv_arch_post_init_vm(int vm_fd)
>
> return ret;
> }
> +
> +static int mshv_load_cleanup(void *opaque)
> +{
> + CPUState *cpu;
> + int ret;
> +
> + ret = mshv_arch_set_partition_msrs(first_cpu);
> + if (ret < 0) {
> + error_report("Failed to set partition MSRs: %s", strerror(-ret));
> + return -1;
> + }
> +
> + CPU_FOREACH(cpu) {
> + ret = mshv_arch_set_mp_state(cpu);
> + if (ret < 0) {
> + error_report("Failed to set mp state for vCPU %d: %s",
> + cpu->cpu_index, strerror(-ret));
> + return -1;
> + }
> + }
> +
> + return 0;
> +}
> +
For me, on x86 this does not build. The SaveVMHandlers type is unknown.
> +static SaveVMHandlers savevm_mshv = {
> + .load_cleanup = mshv_load_cleanup,
> +};
> +
> +int mshv_arch_migration_init(MshvState *s)
> +{
Also, this function here is seen as implicit declaration.
I think there's a missing include in this file.
> + register_savevm_live("mshv", 0, 1, &savevm_mshv, s);
> + mshv_clock_init();
> + return 0;
> +}
>
> --
> 2.45.4
next prev parent reply other threads:[~2026-11-13 11:38 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-01 10:52 [PATCH v6 00/14] Add ARM64 support for MSHV accelerator Aastha Rawat
2026-10-01 10:52 ` [PATCH v6 01/14] accel/mshv: extract common CPU register helpers Aastha Rawat
2026-10-01 10:52 ` [PATCH v6 02/14] accel/mshv: add arch-specific accelerator init hook Aastha Rawat
2026-10-01 10:52 ` [PATCH v6 03/14] accel/mshv: make MSHV migration initialization arch-specific Aastha Rawat
2026-11-13 11:37 ` Doru Blânzeanu [this message]
2026-10-01 10:52 ` [PATCH v6 04/14] meson, target/arm/mshv: Enable arm64 build & add initial MSHV support Aastha Rawat
2026-10-13 16:48 ` Peter Maydell
2026-11-13 12:23 ` Doru Blânzeanu
2026-10-01 10:52 ` [PATCH v6 05/14] target/arm/mshv: implement vcpu state operations for ARM64 Aastha Rawat
2026-10-01 10:52 ` [PATCH v6 06/14] target/arm: convert host CPU feature ifdef ladder to runtime checks Aastha Rawat
2026-10-13 16:46 ` Peter Maydell
2026-10-23 14:37 ` Aastha Rawat
2026-10-01 10:52 ` [PATCH v6 07/14] target/arm/mshv: implement -cpu host for MSHV Aastha Rawat
2026-10-01 10:52 ` [PATCH v6 08/14] accel/mshv: Add access_vp_regs synthetic proc features Aastha Rawat
2026-10-01 10:52 ` [PATCH v6 09/14] target/arm: cpu: Mark MSHV supporting PSCI 1.3 Aastha Rawat
2026-10-01 10:52 ` [PATCH v6 10/14] target/arm: extract MMIO emulation logic for HVF & WHPX Aastha Rawat
2026-10-13 16:40 ` Peter Maydell
2026-10-22 10:27 ` Aastha Rawat
2026-10-01 10:52 ` [PATCH v6 11/14] target/arm/mshv: add vCPU run loop Aastha Rawat
2026-10-13 16:50 ` Peter Maydell
2026-10-16 9:56 ` Anirudh Rayabharam
2026-10-01 10:52 ` [PATCH v6 12/14] include/hw/hyperv: adjust hv_interrupt_control structure for arm64 Aastha Rawat
2026-10-01 10:52 ` [PATCH v6 13/14] hw/intc,target/arm/mshv: add MSHV vGICv3 implementation Aastha Rawat
2026-10-01 10:52 ` [PATCH v6 14/14] MAINTAINERS: updates for MSHV arm64 code Aastha Rawat
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