From: Sean Christopherson <seanjc@google.com>
To: Diptanu Choudhury <diptanu@tensorlake.ai>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH] KVM: x86: Rebuild nested TDP shadows from L1's memory after INVEPT and nSVM TLB flushes
Date: Sat, 14 Nov 2026 08:00:18 -0800 [thread overview]
Message-ID: <aviFkm8685qfavwp@google.com> (raw)
In-Reply-To: <CAFD16ODkmQBbtCgR5iKB_xwXyCMhg=JE2dgXVULNsQMvHMYx+w@mail.gmail.com>
On Fri, Nov 13, 2026, Diptanu Choudhury wrote:
> KVM keeps shadow copies of L1's nested EPT (nVMX) and NPT (nSVM) tables,
> which it keeps in sync by write-protecting the guest pages it shadows:
> vCPU writes to those pages fault, and emulated writes notify the shadow
> MMU via kvm_page_track_write(). Writes from host userspace into guest
> memory reach none of that: a VMM completing a virtio request, or any
> vhost-user backend, writes through the memslot's userspace mapping
> without ever touching write tracking. A device write that lands on a
> page L1 uses as a page table therefore leaves KVM's shadow of that page
> stale.
...
> + * Host writes to L1's nested NPT tables must become visible to L2 after L1
> + * requests a TLB_CONTROL flush at VMRUN.
NAK. This is not supported and has never worked. Maybe after the onslaught of
AI vulnerabilities slows down we can consider supporting (virtual) DMA modifications
to guest PTEs. Maybe. But right now, absolutely not.
prev parent reply other threads:[~2026-11-14 16:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-14 4:47 [PATCH] KVM: x86: Rebuild nested TDP shadows from L1's memory after INVEPT and nSVM TLB flushes Diptanu Choudhury
2026-11-14 16:00 ` Sean Christopherson [this message]
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