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From: Kashyap Desai <kashyap.desai@broadcom.com>
To: Hannes Reinecke <hare@suse.de>, linux-scsi@vger.kernel.org
Cc: jejb@linux.ibm.com, martin.petersen@oracle.com,
	Steve Hagan <steve.hagan@broadcom.com>,
	Peter Rivera <peter.rivera@broadcom.com>,
	mpi3mr-drvr-developers <mpi3mr-linuxdrv.pdl@broadcom.com>,
	Sathya Prakash Veerichetty <sathya.prakash@broadcom.com>
Subject: RE: [PATCH 02/24] mpi3mr: base driver code
Date: Wed, 3 Mar 2021 00:06:53 +0530	[thread overview]
Message-ID: <b1140b05cb2ab8a1c4fccbb33920ea38@mail.gmail.com> (raw)
In-Reply-To: <86097522-6d52-c336-b41c-fc2b4ad8701b@suse.de>

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> > +struct mpi3mr_ioc {
> > +	struct list_head list;
> > +	struct pci_dev *pdev;
> > +	struct Scsi_Host *shost;
> > +	u8 id;
> > +	int cpu_count;
> > +
> > +	char name[MPI3MR_NAME_LENGTH];
> > +	char driver_name[MPI3MR_NAME_LENGTH];
> > +
> > +	Mpi3SysIfRegs_t __iomem *sysif_regs;
> > +	resource_size_t sysif_regs_phys;
> > +	int bars;
> > +	u64 dma_mask;
> > +
> > +	u16 msix_count;
> > +	u8 intr_enabled;
> > +
> > +	u16 num_admin_req;
> > +	u32 admin_req_q_sz;
> > +	u16 admin_req_pi;
> > +	u16 admin_req_ci;
> > +	void *admin_req_base;
> > +	dma_addr_t admin_req_dma;
> > +	spinlock_t admin_req_lock;
> > +
> > +	u16 num_admin_replies;
> > +	u32 admin_reply_q_sz;
> > +	u16 admin_reply_ci;
> > +	u8 admin_reply_ephase;
> > +	void *admin_reply_base;
> > +	dma_addr_t admin_reply_dma;
> > +
> > +	u32 ready_timeout;
> > +
> > +	struct mpi3mr_intr_info *intr_info;
>
> Please, be consistent.
> If you must introduce typedefs for your internal structures, okay.
> But then introduce typedefs for _all_ internal structures.
> Or leave the typedefs and just use 'struct XXX'; which actually is the
> recommended way for linux.

Are you referring " typedef struct mpi3mr_drv_" ?. This is because of some
inter-operability issue of different kernel version. I will remove this
typedef in my V2.
Usually, our goal is not to have typedef in drivers except mpi3.0 header
files. I will scan such instances in and will update all the places.

>
> > +	u16 intr_info_count;
> > +
> > +	u16 num_queues;
> > +	u16 num_op_req_q;
> > +	struct op_req_qinfo *req_qinfo;
> > +
> > +	u16 num_op_reply_q;
> > +	struct op_reply_qinfo *op_reply_qinfo;
> > +
> > +	struct mpi3mr_drv_cmd init_cmds;
> > +	struct mpi3mr_ioc_facts facts;
> > +	u16 op_reply_desc_sz;
> > +
> > +	u32 num_reply_bufs;
> > +	struct dma_pool *reply_buf_pool;
> > +	u8 *reply_buf;
> > +	dma_addr_t reply_buf_dma;
> > +	dma_addr_t reply_buf_dma_max_address;
> > +
> > +	u16 reply_free_qsz;
> > +	struct dma_pool *reply_free_q_pool;
> > +	U64 *reply_free_q;
> > +	dma_addr_t reply_free_q_dma;
> > +	spinlock_t reply_free_queue_lock;
> > +	u32 reply_free_queue_host_index;
> > +
> > +	u32 num_sense_bufs;
> > +	struct dma_pool *sense_buf_pool;
> > +	u8 *sense_buf;
> > +	dma_addr_t sense_buf_dma;
> > +
> > +	u16 sense_buf_q_sz;
> > +	struct dma_pool *sense_buf_q_pool;
> > +	U64 *sense_buf_q;
> > +	dma_addr_t sense_buf_q_dma;
> > +	spinlock_t sbq_lock;
> > +	u32 sbq_host_index;
> > +
> > +	u8 is_driver_loading;
> > +
> > +	u16 max_host_ios;
> > +
> > +	u32 chain_buf_count;
> > +	struct dma_pool *chain_buf_pool;
> > +	struct chain_element *chain_sgl_list;
> > +	u16  chain_bitmap_sz;
> > +	void *chain_bitmap;
> > +
> > +	u8 reset_in_progress;
> > +	u8 unrecoverable;
> > +
> > +	int logging_level;
> > +
> > +	struct mpi3mr_fwevt *current_event;
> > +	Mpi3DriverInfoLayout_t driver_info;
>
> See my comment about struct typedefs above.

I will remove this typedef and similar instances.

> > +static inline int mpi3mr_request_irq(struct mpi3mr_ioc *mrioc, u16
index)
> > +{
> > +	struct pci_dev *pdev = mrioc->pdev;
> > +	struct mpi3mr_intr_info *intr_info = mrioc->intr_info + index;
> > +	int retval = 0;
> > +
> > +	intr_info->mrioc = mrioc;
> > +	intr_info->msix_index = index;
> > +	intr_info->op_reply_q = NULL;
> > +
> > +	snprintf(intr_info->name, MPI3MR_NAME_LENGTH, "%s%d-msix%d",
> > +	    mrioc->driver_name, mrioc->id, index);
> > +
> > +	retval = request_threaded_irq(pci_irq_vector(pdev, index),
> mpi3mr_isr,
> > +	    mpi3mr_isr_poll, IRQF_ONESHOT, intr_info->name, intr_info);
> > +	if (retval) {
> > +		ioc_err(mrioc, "%s: Unable to allocate interrupt %d!\n",
> > +		    intr_info->name, pci_irq_vector(pdev, index));
> > +		return retval;
> > +	}
> > +
>
> The point of having 'mpi3mr_isr_poll()' here is what exactly?

This is a place holder and actual use case is handled in " [17/24] mpi3mr:
add support of threaded isr"
For easy review, I have created separate patch " [17/24] mpi3mr: add
support of threaded isr"
> > +	areq_entry = (u8 *)mrioc->admin_req_base +
> > +	    (areq_pi * MPI3MR_ADMIN_REQ_FRAME_SZ);
> > +	memset(areq_entry, 0, MPI3MR_ADMIN_REQ_FRAME_SZ);
> > +	memcpy(areq_entry, (u8 *)admin_req, admin_req_sz);
> > +
> > +	if (++areq_pi == max_entries)
> > +		areq_pi = 0;
> > +	mrioc->admin_req_pi = areq_pi;
> > +
> > +	writel(mrioc->admin_req_pi, &mrioc->sysif_regs-
> >AdminRequestQueuePI);
> > +
> > +out:
> > +	spin_unlock_irqrestore(&mrioc->admin_req_lock, flags);
> > +
> > +	return retval;
> > +}
> > +
>
> It might be an idea to have an 'admin' queue structure; keeping the
> values all within the main IOC structure might cause cache misses and a
> degraded performance.

Noted your point. We can do it in future update. I think it make sense for
code readability as well.

> > +int mpi3mr_init_ioc(struct mpi3mr_ioc *mrioc)
> > +{
> > +	int retval = 0;
> > +	enum mpi3mr_iocstate ioc_state;
> > +	u64 base_info;
> > +	u32 timeout;
> > +	u32 ioc_status, ioc_config;
> > +	Mpi3IOCFactsData_t facts_data;
> > +
> > +	mrioc->change_count = 0;
> > +	mrioc->cpu_count = num_online_cpus();
>
> What about CPU hotplug?


We have to use num_available_cpus() to get benefit of cpu hotplug. In next
update it will be available.

> > +
> > +/* global driver scop variables */
> > +LIST_HEAD(mrioc_list);
> > +DEFINE_SPINLOCK(mrioc_list_lock);
> > +static int mrioc_ids;
> > +static int warn_non_secure_ctlr;
> > +
> > +MODULE_AUTHOR(MPI3MR_DRIVER_AUTHOR);
> > +MODULE_DESCRIPTION(MPI3MR_DRIVER_DESC);
> > +MODULE_LICENSE(MPI3MR_DRIVER_LICENSE);
> > +MODULE_VERSION(MPI3MR_DRIVER_VERSION);
> > +
> > +/* Module parameters*/
> > +int logging_level;
> > +module_param(logging_level, int, 0);
> > +MODULE_PARM_DESC(logging_level,
> > +	" bits for enabling additional logging info (default=0)");
> > +
> > +
> > +/**
> > + * mpi3mr_map_queues - Map queues callback handler
> > + * @shost: SCSI host reference
> > + *
> > + * Call the blk_mq_pci_map_queues with from which operational
> > + * queue the mapping has to be done
> > + *
> > + * Return: return of blk_mq_pci_map_queues
> > + */
> > +static int mpi3mr_map_queues(struct Scsi_Host *shost)
> > +{
> > +	struct mpi3mr_ioc *mrioc = shost_priv(shost);
> > +
> > +	return blk_mq_pci_map_queues(&shost-
> >tag_set.map[HCTX_TYPE_DEFAULT],
> > +	    mrioc->pdev, 0);
> > +}
> > +
>
> What happened to polling?
> You did some patches for megaraid_sas, so I would have expected them to
> be here, too ...

Internally, Io_uring iopoll is also completed for this driver as well, but
it is under testing and may be available in next update.

> > +module_init(mpi3mr_init);
> > +module_exit(mpi3mr_exit);
> >
> Cheers,

Hannes -

Thanks for the feedback. I am working on all the comments and soon I will
be posting V2.

Kashyap
>
> Hannes
> --
> Dr. Hannes Reinecke		           Kernel Storage Architect
> hare@suse.de			                  +49 911 74053 688
> SUSE Software Solutions Germany GmbH, Maxfeldstr. 5, 90409 Nürnberg
> HRB 36809 (AG Nürnberg), GF: Felix Imendörffer

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  reply	other threads:[~2021-03-02 19:56 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-22 10:11 [PATCH 00/24] Introducing mpi3mr driver Kashyap Desai
2020-12-22 10:11 ` [PATCH 01/24] mpi3mr: add mpi30 Rev-R headers and Kconfig Kashyap Desai
2020-12-22 18:15   ` Bart Van Assche
2020-12-23 13:33     ` Kashyap Desai
2021-02-23 12:30   ` Hannes Reinecke
2021-03-02 18:11     ` Kashyap Desai
2020-12-22 10:11 ` [PATCH 02/24] mpi3mr: base driver code Kashyap Desai
2020-12-27 14:14   ` kernel test robot
2020-12-27 14:14     ` kernel test robot
2021-02-23 12:55   ` Hannes Reinecke
2021-03-02 18:36     ` Kashyap Desai [this message]
2020-12-22 10:11 ` [PATCH 03/24] mpi3mr: create operational request and reply queue pair Kashyap Desai
2020-12-22 18:18   ` Bart Van Assche
2020-12-23 13:16     ` Kashyap Desai
2021-02-28 13:04   ` Hannes Reinecke
2021-03-02 19:05     ` Kashyap Desai
2020-12-22 10:11 ` [PATCH 04/24] mpi3mr: add support of queue command processing Kashyap Desai
2021-02-22 15:23   ` Tomas Henzl
2021-02-25 13:24     ` Kashyap Desai
2021-02-25 14:11       ` Tomas Henzl
2021-02-28 13:22   ` Hannes Reinecke
2021-03-08 18:25     ` Kashyap Desai
2020-12-22 10:11 ` [PATCH 05/24] mpi3mr: add support of internal watchdog thread Kashyap Desai
2021-02-28 13:24   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 06/24] mpi3mr: add support of event handling part-1 Kashyap Desai
2020-12-27 13:14   ` kernel test robot
2020-12-27 13:14     ` kernel test robot
2021-02-22 15:31   ` Tomas Henzl
2021-02-25 13:36     ` Kashyap Desai
2021-03-01  6:47   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 07/24] mpi3mr: add support of event handling pcie devices part-2 Kashyap Desai
2021-03-01  6:52   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 08/24] mpi3mr: add support of event handling part-3 Kashyap Desai
2021-03-01  6:53   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 09/24] mpi3mr: add support for recovering controller Kashyap Desai
2021-03-01  6:56   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 10/24] mpi3mr: add support of timestamp sync with firmware Kashyap Desai
2021-03-01  6:57   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 11/24] mpi3mr: print ioc info for debugging Kashyap Desai
2021-03-01  6:59   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 12/24] mpi3mr: add bios_param shost template hook Kashyap Desai
2021-03-01  7:00   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 13/24] mpi3mr: implement scsi error handler hooks Kashyap Desai
2021-03-01  7:09   ` Hannes Reinecke
2021-04-16 14:12     ` Kashyap Desai
2021-04-16 14:31       ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 14/24] mpi3mr: add change queue depth support Kashyap Desai
2021-03-01  7:10   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 15/24] mpi3mr: allow certain commands during pci-remove hook Kashyap Desai
2021-03-01  7:11   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 16/24] mpi3mr: hardware workaround for UNMAP commands to nvme drives Kashyap Desai
2021-03-01  7:13   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 17/24] mpi3mr: add support of threaded isr Kashyap Desai
2020-12-27 13:51   ` kernel test robot
2020-12-27 13:51     ` kernel test robot
2021-03-01  7:14   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 18/24] mpi3mr: add complete support of soft reset Kashyap Desai
2021-03-01  7:16   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 19/24] mpi3mr: print pending host ios for debug Kashyap Desai
2021-03-01  7:16   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 20/24] mpi3mr: wait for pending IO completions upon detection of VD IO timeout Kashyap Desai
2021-03-01  7:17   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 21/24] mpi3mr: add support of PM suspend and resume Kashyap Desai
2021-02-22 15:32   ` Tomas Henzl
2021-02-25 13:37     ` Kashyap Desai
2021-03-01  7:18   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 22/24] mpi3mr: add support of DSN secure fw check Kashyap Desai
2021-03-01  7:19   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 23/24] mpi3mr: add eedp dif dix support Kashyap Desai
2021-02-22 15:37   ` Tomas Henzl
2021-02-25 13:39     ` Kashyap Desai
2021-03-01  7:20   ` Hannes Reinecke
2020-12-22 10:11 ` [PATCH 24/24] mpi3mr: add event handling debug prints Kashyap Desai
2021-03-01  7:20   ` Hannes Reinecke
2021-02-22 15:39 ` [PATCH 00/24] Introducing mpi3mr driver Tomas Henzl

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