From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46693) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bxU1s-0001cv-Mb for qemu-devel@nongnu.org; Fri, 21 Oct 2016 03:14:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bxU1n-000154-N7 for qemu-devel@nongnu.org; Fri, 21 Oct 2016 03:14:12 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41556) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bxU1n-00014U-Fi for qemu-devel@nongnu.org; Fri, 21 Oct 2016 03:14:07 -0400 References: <1476719064-9242-1-git-send-email-bd.aviv@gmail.com> <1476719064-9242-2-git-send-email-bd.aviv@gmail.com> From: Jason Wang Message-ID: Date: Fri, 21 Oct 2016 15:14:00 +0800 MIME-Version: 1.0 In-Reply-To: <1476719064-9242-2-git-send-email-bd.aviv@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v4 RESEND 1/3] IOMMU: add option to enable VTD_CAP_CM to vIOMMU capility exposoed to guest List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Aviv B.D" , qemu-devel@nongnu.org Cc: Jan Kiszka , Alex Williamson , Peter Xu , "Michael S. Tsirkin" On 2016=E5=B9=B410=E6=9C=8817=E6=97=A5 23:44, Aviv B.D wrote: > From: "Aviv Ben-David" > > This capability asks the guest to invalidate cache before each map oper= ation. > We can use this invalidation to trap map operations in the hypervisor. > > Signed-off-by: Aviv Ben-David > --- > hw/i386/intel_iommu.c | 5 +++++ > hw/i386/intel_iommu_internal.h | 1 + > include/hw/i386/intel_iommu.h | 2 ++ > 3 files changed, 8 insertions(+) As I asked in previous version, this may not be sufficient. CM requires to cache fault translations which is not implemented in this=20 patch. Guest can easily notice this kind of spec violation. Thanks > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index 2efd69b..69730cb 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -2012,6 +2012,7 @@ static const MemoryRegionOps vtd_mem_ops =3D { > =20 > static Property vtd_properties[] =3D { > DEFINE_PROP_UINT32("version", IntelIOMMUState, version, 0), > + DEFINE_PROP_BOOL("cache-mode", IntelIOMMUState, cache_mode_enabled= , FALSE), > DEFINE_PROP_END_OF_LIST(), > }; > =20 > @@ -2385,6 +2386,10 @@ static void vtd_init(IntelIOMMUState *s) > s->ecap |=3D VTD_ECAP_IR | VTD_ECAP_EIM | VTD_ECAP_MHMV; > } > =20 > + if (s->cache_mode_enabled) { > + s->cap |=3D VTD_CAP_CM; > + } > + > vtd_reset_context_cache(s); > vtd_reset_iotlb(s); > =20 > diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_inter= nal.h > index 0829a50..35d9f3a 100644 > --- a/hw/i386/intel_iommu_internal.h > +++ b/hw/i386/intel_iommu_internal.h > @@ -201,6 +201,7 @@ > #define VTD_CAP_MAMV (VTD_MAMV << 48) > #define VTD_CAP_PSI (1ULL << 39) > #define VTD_CAP_SLLPS ((1ULL << 34) | (1ULL << 35)) > +#define VTD_CAP_CM (1ULL << 7) > =20 > /* Supported Adjusted Guest Address Widths */ > #define VTD_CAP_SAGAW_SHIFT 8 > diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iomm= u.h > index a42dbd7..7a94f16 100644 > --- a/include/hw/i386/intel_iommu.h > +++ b/include/hw/i386/intel_iommu.h > @@ -258,6 +258,8 @@ struct IntelIOMMUState { > uint8_t womask[DMAR_REG_SIZE]; /* WO (write only - read returns = 0) */ > uint32_t version; > =20 > + bool cache_mode_enabled; /* RO - is cap CM enabled? */ > + > dma_addr_t root; /* Current root table pointer */ > bool root_extended; /* Type of root table (extended o= r not) */ > bool dmar_enabled; /* Set if DMA remapping is enable= d */