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Tue, 19 Mar 2024 08:48:38 -0700 (PDT) Message-ID: Date: Tue, 19 Mar 2024 16:48:36 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH-for-9.1 00/27] accel/tcg: Introduce TCGCPUOps::get_cpu_state() handler Content-Language: en-US To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Richard Henderson , qemu-ppc@nongnu.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, Anton Johansson , Claudio Fontana References: <20240319154258.71206-1-philmd@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20240319154258.71206-1-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org Sender: qemu-riscv-bounces+qemu-riscv=archiver.kernel.org@nongnu.org (Forgot to Cc Claudio to keep him updated) On 19/3/24 16:42, Philippe Mathieu-Daudé wrote: > Hi, > > This series introduce a generic get_cpu_state() handler in > TCGCPUOps and convert each target to it. > > This is required to get a single cpu_get_tb_cpu_state() > for heterogeneous emulation (since this method is called > by accel/tcg/). > > Regards, > > Phil. > > Philippe Mathieu-Daudé (27): > accel/tcg: Ensure frontends define restore_state_to_opc handler > accel/tcg: Introduce TCGCPUOps::get_cpu_state() handler > target/alpha: Convert to TCGCPUOps::get_cpu_state() > target/arm: Restrict TCG-specific declarations > target/arm: Convert to TCGCPUOps::get_cpu_state() > target/avr: Convert to TCGCPUOps::get_cpu_state() > target/cris: Convert to TCGCPUOps::get_cpu_state() > target/hexagon: Convert to TCGCPUOps::get_cpu_state() > target/hppa: Convert to TCGCPUOps::get_cpu_state() > target/i386: Convert to TCGCPUOps::get_cpu_state() > target/loongarch: Convert to TCGCPUOps::get_cpu_state() > target/m68k: Convert to TCGCPUOps::get_cpu_state() > target/microblaze: Convert to TCGCPUOps::get_cpu_state() > target/mips: Convert to TCGCPUOps::get_cpu_state() > target/nios2: Convert to TCGCPUOps::get_cpu_state() > target/openrisc: Convert to TCGCPUOps::get_cpu_state() > target/ppc: Indent ppc_tcg_ops[] with 4 spaces > target/ppc: Convert to TCGCPUOps::get_cpu_state() > target/riscv: Convert to TCGCPUOps::get_cpu_state() > target/rx: Convert to TCGCPUOps::get_cpu_state() > target/s390x: Restrict TCG-specific declarations > target/s390x: Convert to TCGCPUOps::get_cpu_state() > target/sh4: Convert to TCGCPUOps::get_cpu_state() > target/sparc: Convert to TCGCPUOps::get_cpu_state() > target/tricore: Convert to TCGCPUOps::get_cpu_state() > target/xtensa: Convert to TCGCPUOps::get_cpu_state() > accel/tcg: Remove check on TARGET_HAS_CPU_GET_TB_CPU_STATE