From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BD439C07E9D for ; Tue, 27 Sep 2022 21:10:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=sgq1b8r0CC+gevfDnEUHXG9+q7STiUKEkK1SktYEkts=; b=USWjaeacJbahVQ llFblLeDk2jAQ1PAiaEOrf/3uYuuZ82yjbKrt+uo4TWBHo/Ph/bXe+1T2cx2aYL3AJrgi38k0rc51 HhLt2fIK+GAkYRkgH4KGVoTF7cvLIzr4I/JR1sYfwqe0ebOMQdON/VJU3Tdoax9rhPif5Iy85pV6A 1V18C3GBDaUl7Uq/GQCjWDJjj/543grcRUQ+xM43xmqI2z079J5mnfFsFwPXTTK7+jp8p2nv4KslX KSE8Zv1rI9Ehs95ut20L4yvwVboGi7fTvbr901zWpij33k/LRdJQELluhgH6A52FBscldZs/vfzzo MGoXoACCciY9ztcsm2DQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1odHov-00CeQA-IJ; Tue, 27 Sep 2022 21:08:49 +0000 Received: from phobos.denx.de ([2a01:238:438b:c500:173d:9f52:ddab:ee01]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1odHop-00CeOR-GU for linux-arm-kernel@lists.infradead.org; Tue, 27 Sep 2022 21:08:47 +0000 Received: from [127.0.0.1] (p578adb1c.dip0.t-ipconnect.de [87.138.219.28]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 96013803D2; Tue, 27 Sep 2022 23:08:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1664312921; bh=EFfGH/L12kdevlvPec5DYp29wOSV/Bad2mrFc5rC6/c=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Zt4w/frWMqqBFPUANfjUIRpmtxIWeIOqg4X0xalJWSvg7eO3ZarWiGotmSUziLGmE DDNQ1Tsww26h13/dVY4R7GCkaHv2GTKxHzGqX5toeN+PW5/LhEDvxE+89P7/OVKu9t bUI+UQUQQpBNA+xxIbO4risLZC+nex9EFc280Pox8J7x9Lz7vn01HEKGCtb26I9JeI idUtEKmySEFW9GJse7EMnjPTfSDwd3QY4tv2E2IZRnGadURvfo85wuqxqVfjmZ9D/9 w6ejTblnE7thxD9TD82eFXA6De3JeDfea0BQ4qRnpiPWcruv2/mYQhIBBueY2xQC38 jD0Rz3qJQ93EQ== Message-ID: Date: Tue, 27 Sep 2022 23:08:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH] arm64: dts: imx8mm: Model PMIC to SNVS RTC clock path on Data Modul i.MX8M Mini eDM SBC Content-Language: en-US To: Tim Harvey Cc: linux-arm-kernel@lists.infradead.org, Fabio Estevam , NXP Linux Team , Peng Fan , Shawn Guo References: <20220924174603.458956-1-marex@denx.de> <0bb82751-a611-e8cd-54bd-e0d04b709133@denx.de> From: Marek Vasut In-Reply-To: X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220927_140845_383550_52F599BF X-CRM114-Status: GOOD ( 39.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/27/22 22:43, Tim Harvey wrote: > On Tue, Sep 27, 2022 at 1:31 PM Marek Vasut wrote: >> >> On 9/27/22 22:23, Tim Harvey wrote: >>> On Tue, Sep 27, 2022 at 1:10 PM Marek Vasut wrote: >>>> >>>> On 9/27/22 21:43, Tim Harvey wrote: >>>> >>>> Tim, >>>> >>>>> Marek, >>>>> >>>>> The modeling here makes sense, but I tried this on the boards I have >>>>> with the rohm,bd71847 and it did not bump the clk_enable_count for >>>>> clk-32k-out and thus drivers/clk/clk-bd718x7.c still disables the >>>>> clock. Is something else required to make that happen? >>>> >>>> The only thing I can think of is, do you have SNVS_RTC driver enabled >>>> and compiled in, just like the PMIC, or are they maybe modules ? >>>> >>>> You can always try and add a printk() into the snvs rtc driver and see >>>> whether the clk_get there doesn't fail for some reason, and what the >>>> error code is. >>> >>> Marek, >> >> Tim, >> >>> Thanks! I did 'not' have CONFIG_RTC_DRV_SNVS enabled in this test case >>> and as soon as I enable that it does bump the count and enable the >>> clock. We actually have a separate watchdog on our boards so I >>> typically disable the SNVS one to avoid the confusion of having two >>> watchdogs for our users. I tried adding 'clocks = <&pmic>' to the wdog >>> node and disalbing the RTC_DRV_SNVS again but it fails to enable that >>> clock. >> >> I believe the 32 kHz fed into the SNVS RTC are mandatory, they must be >> supplied to the MX8M otherwise the SoC hangs. So whatever supplies the >> RTC_XTALI on your board should be connected to the SNVS RTC node clock >> and the SNVS RTC should be enabled. > > hmmm... I'm not sure if I agree that the SNVS RTC must be enabled. The > effect of the BD718XX CLK not being enabled is for sure that the SNVS > RTC does not tick 'and' the WDOG timer does not work (simulating a > kernel crash with sysreq_trigger for example hangs indefinitely). If I > leave the SNVS RTC disabled but force the CLK to be enabled (by > disabling CONFIG_COMMON_CLK_BD718XX) the WDOG behaves properly (as > well as the RTC if I have that enabled, but enabling it is not > required). "i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020" page 759 says the RTC_XTALI is 32 kHz supply to the SVNS RTC . Without the 32 kHz clock the SoC hangs. So I would say, yes, the SNVS RTC should be enabled. I have seen the i.MX8M (different ones) hang with 32 kHz RTC_XTALI disabled consistently, so the SoC clearly does require those clock, it is not a board property. My personal hypothesis is that the 32k clock are also used for something else, something which is not listed in the datasheet, sigh. > Maybe there is some board stability issue that I have failed to see as > I have not done much testing with the BD718XX CLK disabled but I > certainly want to make it enabled by default. > >> >>> Also I wonder if your patch deserves a 'Fixes: acb01032e11a5 ("arm64: >>> defconfig: Enable clock driver for ROHM BD718x7 PMIC")' tag? >> >> No, since the current board DT without this patch is not really broken. >> Without the clock parts in the PMIC node, the PMIC just supplies 32 kHz >> clock and does not disable those clock, because Linux is not even aware >> of them, so everything works just fine even if the PMIC driver is >> enabled. This could potentially by a Fixes for this specific board DT, >> but I am don't think it's worth it either. > > For any board with a BD718x7 PMIC providing the CLK to IMX8M RTC > without your dt change enabling CONFIG_COMMON_CLK_BD718XX will cause > the CLK to get diabled thus the SNVS RTC 'and' WDOG will not function. No, that is not the case. The bd7xxxx-clk is only probed if there are valid upstream clock specified in the PMIC DT node (the 'clocks = <&clk_xtal32k 0>;' part of this patch). If the clocks property is not present in the PMIC node, the bd7xxxx-clk won't probe and kernel won't disable the 32k PMIC clock. That's the case here, hence this board was not failing to start before, and won't fail to start with this patch, no matter whether or not the bd7xxxx-clk driver is compiled in or not, and so no need for the Fixes tag really. > So one could argue the dt change fixes the config enabling the clock > driver. It won't cause the board to crash, but it will cause it to not > wdog reset from a crash ;) I really disagree with that, you cannot really argue that DT change fixes defconfig, that is plain backwards ;) I would rather suggest something else -- if you want to advertise this as a fix for the 32k clock hang, fix board you use which currently suffers from hang if you enable the bd7xxxx-clk driver, add Fixes tag for commit which added the board and reference the defconfig commit too. That would be the idea way to document that and tie all the pieces of information together. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel