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Sat, 03 Oct 2026 01:11:04 -0700 (PDT) Message-ID: Date: Sat, 3 Oct 2026 09:11:03 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/4] dt-bindings: mmc: amlogic,meson-gx-mmc: document the T7 pipeline clock To: Rob Herring Cc: Ulf Hansson , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Jerome Brunet , Kevin Hilman , Martin Blumenstingl , Stephen Boyd , Brian Masney , Chuan Liu , Jian Hu , Ronald Claveau , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260905153234.133217-1-tanure@linux.com> <20260905153234.133217-2-tanure@linux.com> <20260916203701.GA1463751-robh@kernel.org> Content-Language: en-US From: Lucas Tanure In-Reply-To: <20260916203701.GA1463751-robh@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261003_011107_310420_9A36BF51 X-CRM114-Status: GOOD ( 13.98 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On 16/09/2026 21:37, Rob Herring wrote: > On Sat, Sep 05, 2026 at 04:32:31PM +0100, Lucas Tanure wrote: >> The SD/eMMC controllers of the T7 SoC are physically far from the >> NIC_MATRIX bus fabric, so the hardware design inserts a pipeline stage >> in the middle of the bus path to help timing closure. This stage is fed >> by its own gate clock and, when that clock is disabled, a controller >> that starts a DMA transfer can never complete it. >> >> Allow a fourth clock entry, named "pipeline", and require it for the >> amlogic,t7-mmc compatible. The other controllers of this family keep >> the existing three clocks. > > Did the SD controller not work without this clock? If it did, then this > is an ABI break which is evident by the current warning in linux-next. > > Rob Yes, the SD controller doesn't work with this clock, so I don't think is a ABI break, as the current code doesn't work and the board crashes a lot. And a few patches got merged from my work, so I will resubmit a new series for this. Thanks Lucas _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm2-f13.google.com (mail-wm2-f13.google.com [74.125.225.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CFEB330C164 for ; Sat, 3 Oct 2026 08:11:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.225.141 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791015068; cv=none; b=secKMQt1wcQ1ONAaw34MzJ/CY6YQedAdCxWuVw/nqQt07xHGnQbjPZDybhxoGj6GLo05E9PjCVs92Xcjq34ma5AWWIAWHoteSb7VX3jPY37eahltafUV5AayHEJECUs2Qk++TUfPJ2Ukovug/30XbGNgpn87zJ3eLNBfFpM9egQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791015068; c=relaxed/simple; bh=wtwQ6JzEMapAlW6zEvQWmul06EKyW5l8OOrIKIXFqHg=; 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Sat, 03 Oct 2026 01:11:04 -0700 (PDT) Received: from [192.168.1.135] ([84.68.183.72]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48b82253e7esm10140636f8f.0.2026.10.03.01.11.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 03 Oct 2026 01:11:04 -0700 (PDT) Message-ID: Date: Sat, 3 Oct 2026 09:11:03 +0100 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/4] dt-bindings: mmc: amlogic,meson-gx-mmc: document the T7 pipeline clock To: Rob Herring Cc: Ulf Hansson , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Jerome Brunet , Kevin Hilman , Martin Blumenstingl , Stephen Boyd , Brian Masney , Chuan Liu , Jian Hu , Ronald Claveau , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260905153234.133217-1-tanure@linux.com> <20260905153234.133217-2-tanure@linux.com> <20260916203701.GA1463751-robh@kernel.org> Content-Language: en-US From: Lucas Tanure In-Reply-To: <20260916203701.GA1463751-robh@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 16/09/2026 21:37, Rob Herring wrote: > On Sat, Sep 05, 2026 at 04:32:31PM +0100, Lucas Tanure wrote: >> The SD/eMMC controllers of the T7 SoC are physically far from the >> NIC_MATRIX bus fabric, so the hardware design inserts a pipeline stage >> in the middle of the bus path to help timing closure. This stage is fed >> by its own gate clock and, when that clock is disabled, a controller >> that starts a DMA transfer can never complete it. >> >> Allow a fourth clock entry, named "pipeline", and require it for the >> amlogic,t7-mmc compatible. The other controllers of this family keep >> the existing three clocks. > > Did the SD controller not work without this clock? If it did, then this > is an ABI break which is evident by the current warning in linux-next. > > Rob Yes, the SD controller doesn't work with this clock, so I don't think is a ABI break, as the current code doesn't work and the board crashes a lot. And a few patches got merged from my work, so I will resubmit a new series for this. Thanks Lucas