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From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: "Michael J. Ruhl" <michael.j.ruhl@intel.com>
Cc: intel-xe@lists.freedesktop.org,
	platform-driver-x86@vger.kernel.org,
	 david.e.box@linux.intel.com, matthew.brost@intel.com
Subject: Re: [PATCH v6 5/6] platform/x86/intel/pmt: Add support for PMT base adjust
Date: Thu, 11 Jul 2024 14:34:15 +0300 (EEST)	[thread overview]
Message-ID: <b521ebe3-e7d2-6ca9-e626-ae9d3a455078@linux.intel.com> (raw)
In-Reply-To: <20240710192249.3915396-6-michael.j.ruhl@intel.com>

On Wed, 10 Jul 2024, Michael J. Ruhl wrote:

> DVSEC offsets are based on the endpoint BAR.  If an endpoint is
> not avialable allow the offset information to be adjusted by the

available

> parent driver.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
> ---
>  drivers/platform/x86/intel/pmt/class.h     | 1 +
>  drivers/platform/x86/intel/pmt/telemetry.c | 9 +++++++++
>  drivers/platform/x86/intel/vsec.c          | 1 +
>  include/linux/intel_vsec.h                 | 2 ++
>  4 files changed, 13 insertions(+)
> 
> diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/intel/pmt/class.h
> index a267ac964423..984cd40ee814 100644
> --- a/drivers/platform/x86/intel/pmt/class.h
> +++ b/drivers/platform/x86/intel/pmt/class.h
> @@ -46,6 +46,7 @@ struct intel_pmt_entry {
>  	void __iomem		*base;
>  	struct pmt_callbacks	*cb;
>  	unsigned long		base_addr;
> +	s32			base_adjust;
>  	size_t			size;
>  	u32			guid;
>  	int			devid;
> diff --git a/drivers/platform/x86/intel/pmt/telemetry.c b/drivers/platform/x86/intel/pmt/telemetry.c
> index c9feac859e57..5c44e500e8f6 100644
> --- a/drivers/platform/x86/intel/pmt/telemetry.c
> +++ b/drivers/platform/x86/intel/pmt/telemetry.c
> @@ -78,6 +78,13 @@ static int pmt_telem_header_decode(struct intel_pmt_entry *entry,
>  	header->access_type = TELEM_ACCESS(readl(disc_table));
>  	header->guid = readl(disc_table + TELEM_GUID_OFFSET);
>  	header->base_offset = readl(disc_table + TELEM_BASE_OFFSET);
> +	if (entry->base_adjust) {
> +		u32 new_base = header->base_offset + entry->base_adjust;

The code setting ->base_adjust is responsible for avoiding stupid settings 
that would lead to underflows and overflows?

> +
> +		dev_dbg(dev, "Adjusting baseoffset from 0x%x to 0x%x\n",

base offset

-- 
 i.

> +			header->base_offset, new_base);
> +		header->base_offset = new_base;
> +	}
>  
>  	/* Size is measured in DWORDS, but accessor returns bytes */
>  	header->size = TELEM_SIZE(readl(disc_table));
> @@ -302,6 +309,8 @@ static int pmt_telem_probe(struct auxiliary_device *auxdev, const struct auxilia
>  	for (i = 0; i < intel_vsec_dev->num_resources; i++) {
>  		struct intel_pmt_entry *entry = &priv->entry[priv->num_entries];
>  
> +		entry->base_adjust = intel_vsec_dev->base_adjust;
> +
>  		mutex_lock(&ep_lock);
>  		ret = intel_pmt_dev_create(entry, &pmt_telem_ns, intel_vsec_dev, i);
>  		mutex_unlock(&ep_lock);
> diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel/vsec.c
> index 7b5cc9993974..be079d62a7bc 100644
> --- a/drivers/platform/x86/intel/vsec.c
> +++ b/drivers/platform/x86/intel/vsec.c
> @@ -212,6 +212,7 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *he
>  	intel_vsec_dev->num_resources = header->num_entries;
>  	intel_vsec_dev->quirks = info->quirks;
>  	intel_vsec_dev->base_addr = info->base_addr;
> +	intel_vsec_dev->base_adjust = info->base_adjust;
>  	intel_vsec_dev->priv_data = info->priv_data;
>  
>  	if (header->id == VSEC_ID_SDSI)
> diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h
> index 4569a55e8645..1fd0fcc5615d 100644
> --- a/include/linux/intel_vsec.h
> +++ b/include/linux/intel_vsec.h
> @@ -95,6 +95,7 @@ struct intel_vsec_platform_info {
>  	unsigned long caps;
>  	unsigned long quirks;
>  	u64 base_addr;
> +	s32 base_adjust;
>  };
>  
>  /**
> @@ -120,6 +121,7 @@ struct intel_vsec_device {
>  	size_t priv_data_size;
>  	unsigned long quirks;
>  	u64 base_addr;
> +	s32 base_adjust;
>  };
>  
>  int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent,
> 

  reply	other threads:[~2024-07-11 11:34 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-10 19:22 [PATCH v6 0/6] Support PMT features in Xe Michael J. Ruhl
2024-07-10 19:22 ` [PATCH v6 1/6] platform/x86/intel/vsec.h: Move to include/linux Michael J. Ruhl
2024-07-11 11:09   ` Ilpo Järvinen
2024-07-10 19:22 ` [PATCH v6 2/6] platform/x86/intel/vsec: Add PMT read callbacks Michael J. Ruhl
2024-07-11 11:16   ` Ilpo Järvinen
2024-07-11 15:57     ` Ruhl, Michael J
2024-07-10 19:22 ` [PATCH v6 3/6] platform/x86/intel/pmt: Use PMT callbacks Michael J. Ruhl
2024-07-10 19:22 ` [PATCH v6 4/6] drm/xe/vsec: Support BMG devices Michael J. Ruhl
2024-07-10 19:22 ` [PATCH v6 5/6] platform/x86/intel/pmt: Add support for PMT base adjust Michael J. Ruhl
2024-07-11 11:34   ` Ilpo Järvinen [this message]
2024-07-11 20:56     ` Ruhl, Michael J
2024-07-12  8:31       ` Ilpo Järvinen
2024-07-10 19:22 ` [PATCH v6 6/6] drm/xe/vsec: Add support for DG2 Michael J. Ruhl
2024-07-11 11:44   ` Ilpo Järvinen
2024-07-11 17:44     ` Ruhl, Michael J
2024-07-10 19:28 ` ✓ CI.Patch_applied: success for Support PMT features in Xe (rev7) Patchwork
2024-07-10 19:29 ` ✗ CI.checkpatch: warning " Patchwork
2024-07-10 19:30 ` ✓ CI.KUnit: success " Patchwork
2024-07-10 19:42 ` ✓ CI.Build: " Patchwork
2024-07-10 19:44 ` ✓ CI.Hooks: " Patchwork
2024-07-10 19:45 ` ✓ CI.checksparse: " Patchwork
2024-07-10 20:12 ` ✓ CI.BAT: " Patchwork
2024-07-10 21:27 ` ✗ CI.FULL: failure " Patchwork

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