From mboxrd@z Thu Jan 1 00:00:00 1970 From: Samuel Holland Date: Wed, 4 Sep 2024 09:31:55 -0500 Subject: [PATCH v4 09/10] RISC-V: KVM: Allow Smnpm and Ssnpm extensions for guests In-Reply-To: References: <20240829010151.2813377-1-samuel.holland@sifive.com> <20240829010151.2813377-10-samuel.holland@sifive.com> Message-ID: List-Id: To: kvm-riscv@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Hi Anup, On 2024-09-04 7:17 AM, Anup Patel wrote: > On Thu, Aug 29, 2024 at 6:32?AM Samuel Holland > wrote: >> >> The interface for controlling pointer masking in VS-mode is henvcfg.PMM, >> which is part of the Ssnpm extension, even though pointer masking in >> HS-mode is provided by the Smnpm extension. As a result, emulating Smnpm >> in the guest requires (only) Ssnpm on the host. >> >> Since the guest configures Smnpm through the SBI Firmware Features >> interface, the extension can be disabled by failing the SBI call. Ssnpm >> cannot be disabled without intercepting writes to the senvcfg CSR. >> >> Signed-off-by: Samuel Holland >> --- >> >> (no changes since v2) >> >> Changes in v2: >> - New patch for v2 >> >> arch/riscv/include/uapi/asm/kvm.h | 2 ++ >> arch/riscv/kvm/vcpu_onereg.c | 3 +++ >> 2 files changed, 5 insertions(+) >> >> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h >> index e97db3296456..4f24201376b1 100644 >> --- a/arch/riscv/include/uapi/asm/kvm.h >> +++ b/arch/riscv/include/uapi/asm/kvm.h >> @@ -175,6 +175,8 @@ enum KVM_RISCV_ISA_EXT_ID { >> KVM_RISCV_ISA_EXT_ZCF, >> KVM_RISCV_ISA_EXT_ZCMOP, >> KVM_RISCV_ISA_EXT_ZAWRS, >> + KVM_RISCV_ISA_EXT_SMNPM, >> + KVM_RISCV_ISA_EXT_SSNPM, >> KVM_RISCV_ISA_EXT_MAX, >> }; >> >> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c >> index b319c4c13c54..6f833ec2344a 100644 >> --- a/arch/riscv/kvm/vcpu_onereg.c >> +++ b/arch/riscv/kvm/vcpu_onereg.c >> @@ -34,9 +34,11 @@ static const unsigned long kvm_isa_ext_arr[] = { >> [KVM_RISCV_ISA_EXT_M] = RISCV_ISA_EXT_m, >> [KVM_RISCV_ISA_EXT_V] = RISCV_ISA_EXT_v, >> /* Multi letter extensions (alphabetically sorted) */ >> + [KVM_RISCV_ISA_EXT_SMNPM] = RISCV_ISA_EXT_SSNPM, > > Why not use KVM_ISA_EXT_ARR() macro here ? Because the extension name in the host does not match the extension name in the guest. Pointer masking for HS mode is provided by Smnpm. Pointer masking for VS mode is provided by Ssnpm at the hardware level, but this needs to appear to the guest as if Smnpm was implemented, since the guest thinks it is running on bare metal. >> KVM_ISA_EXT_ARR(SMSTATEEN), >> KVM_ISA_EXT_ARR(SSAIA), >> KVM_ISA_EXT_ARR(SSCOFPMF), >> + KVM_ISA_EXT_ARR(SSNPM), >> KVM_ISA_EXT_ARR(SSTC), >> KVM_ISA_EXT_ARR(SVINVAL), >> KVM_ISA_EXT_ARR(SVNAPOT), >> @@ -129,6 +131,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) >> case KVM_RISCV_ISA_EXT_M: >> /* There is not architectural config bit to disable sscofpmf completely */ >> case KVM_RISCV_ISA_EXT_SSCOFPMF: >> + case KVM_RISCV_ISA_EXT_SSNPM: > > Why not add KVM_RISCV_ISA_EXT_SMNPM here ? > > Disabling Smnpm from KVM user space is very different from > disabling Smnpm from Guest using SBI FWFT extension. Until a successful SBI FWFT call to KVM to enable pointer masking for VS mode, the existence of Smnpm has no visible effect on the guest. So failing the SBI call is sufficient to pretend that the hardware does not support Smnpm. > The KVM user space should always add Smnpm in the > Guest ISA string whenever the Host ISA string has it. I disagree. Allowing userspace to disable extensions is useful for testing and to support migration to hosts which do not support those extensions. So I would only add extensions to this list if there is no possible way to disable them. > The Guest must explicitly use SBI FWFT to enable > Smnpm only after it sees Smnpm in ISA string. Yes, exactly, and the purpose of not including Smnpm in the switch case here is so that KVM user space can control whether or not it appears in the ISA string. Regards, Samuel >> case KVM_RISCV_ISA_EXT_SSTC: >> case KVM_RISCV_ISA_EXT_SVINVAL: >> case KVM_RISCV_ISA_EXT_SVNAPOT: >> -- >> 2.45.1 >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv at lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv > > Regards, > Anup From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B259CCA0ED3 for ; Wed, 4 Sep 2024 14:32:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Zh336PZB7OEUfZQgL7Xe/e2qQfQ4NlHbUXSgkrU+ips=; b=RcY0o3HyugTxXG SBbw9D9i9tCnq72LCnkFEVq83fqOyWShCE3WpPVS1qINbjTZLQ/UKsa3dJhGgOnXB5IcBFcZclQSm NwtSdy1YR+FCD/ZqUFn7qp0wnjGv5Rb5ua/dfcKjNaleI2avHZ06RT914T+cJta7Jv2SexEnQtlkG iRxImPjEIwtyRYWrh6z+b1T87YVbTiBHYvM6akiow4MMz36Iaw8nE63fO5zG/jgC+Zq7hIHQPA9uU HlKXXG9AKWjlrryEHVUxm5Ih6R/VtsjnmI/94qF15AJlwKfpSEtC0iHWyQe3neJXVZwuCIOKmearI U62HXmTST/YxKz0zJHCw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1slr3D-00000004nkD-2GO8; Wed, 04 Sep 2024 14:32:03 +0000 Received: from mail-io1-xd32.google.com ([2607:f8b0:4864:20::d32]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1slr39-00000004niy-2tkD for linux-riscv@lists.infradead.org; Wed, 04 Sep 2024 14:32:01 +0000 Received: by mail-io1-xd32.google.com with SMTP id ca18e2360f4ac-82a24dec9cbso29163739f.1 for ; Wed, 04 Sep 2024 07:31:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1725460318; x=1726065118; darn=lists.infradead.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=7zATIwTHrXGiuEASzCytr2UxxMjPOWVj85mDZ7xtUWY=; b=fShNzHpaB8DnawO0SrXQyAcoZ9CzaASPZVAwiQEIHiYoQhNJnQOdifPEjXoPwqUG+6 0s717qFo80EVMkFb08k3BLAVocCT1aUuAcK7L7x/mMQrFVEUcrCtoCswtSKIvU44WcJQ 5/axGxdSjGkBZC1E86zt+poIR1L4ovlzRbozd+V2I3aMavN/Y2dB10v/WR5fV3u6ycJk uW/HRzvTCZvO6dobdegclpymLGVExwyOx7/1GfGyiLSpl9p9GMQx/sSFbfEV0csc64o8 HNx8chxHMyGobwueJwbwb7P9j2Kn7kJXwpMFEnUQnhfmCamtf3iJYcT3+havy0AJOe5l DC3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1725460318; x=1726065118; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=7zATIwTHrXGiuEASzCytr2UxxMjPOWVj85mDZ7xtUWY=; b=L4/WzME8RIkw+ShPujB8U5dhLcC3BC/BsL5ZettXaDYUEYP6XURRuHMe5EC+ZP1H+F Kr8ZR+WMYWV8mkz3ZhkItGpj34/WpQ77Tuyv4q3s03cH2mOlnimKnxgcE9xVZzIo1+B1 qhYO31HanDEPS01UTFe3XcbynSxkUJsUhm8LaVoQIfrx9JLdL/f54yKWF8GGdrF2ETWd N8rpMcm9Hj8CsGtLzfXlLxfx6JWo9+YhNQz43dQwQUnagKV+GkmYxQgrkVTaPjRs/GMw GRvx7za51Di21a5CE7IhPhE+mqMGGEgNfUMRrXW1sRH0kLMj4JQQN6L5ZW+ma3nB3klH 3C9Q== X-Forwarded-Encrypted: i=1; AJvYcCWUqD82/oEDj+quJTufk8tJyX1AnPBa+hRpb8BQi+pChCHGgChAXBHrGBeRoqvEmX4R2gMo+7o6O+lzNQ==@lists.infradead.org X-Gm-Message-State: AOJu0YxfdQc+AaPFB0hPQuLg41i9q5IMsIkazJG5pjMZ/okz4ML2V010 vliK6faQwgshXbuyRCDiLVWUC1xTZxHaGayu/s+ezasc1ybQB3MKOZhJ9APl5Z0= X-Google-Smtp-Source: AGHT+IGm922K5aFjLbKMqisIulQGXLK1ylnjjkQghXfkGhr+kR8pZuYKfC5l0rEzVrrQHd7K7bQv8A== X-Received: by 2002:a6b:7e0c:0:b0:806:3dac:5081 with SMTP id ca18e2360f4ac-82a7920d595mr183512639f.7.1725460317814; Wed, 04 Sep 2024 07:31:57 -0700 (PDT) Received: from [100.64.0.1] ([147.124.94.167]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-4ced2ee8559sm3114240173.174.2024.09.04.07.31.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 Sep 2024 07:31:57 -0700 (PDT) Message-ID: Date: Wed, 4 Sep 2024 09:31:55 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 09/10] RISC-V: KVM: Allow Smnpm and Ssnpm extensions for guests To: Anup Patel Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Catalin Marinas , linux-kernel@vger.kernel.org, Anup Patel , Conor Dooley , kasan-dev@googlegroups.com, Atish Patra , Evgenii Stepanov , Krzysztof Kozlowski , Rob Herring , "Kirill A . Shutemov" , kvm-riscv@lists.infradead.org References: <20240829010151.2813377-1-samuel.holland@sifive.com> <20240829010151.2813377-10-samuel.holland@sifive.com> Content-Language: en-US From: Samuel Holland In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240904_073159_839614_FDFA54C7 X-CRM114-Status: GOOD ( 24.51 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org SGkgQW51cCwKCk9uIDIwMjQtMDktMDQgNzoxNyBBTSwgQW51cCBQYXRlbCB3cm90ZToKPiBPbiBU aHUsIEF1ZyAyOSwgMjAyNCBhdCA2OjMy4oCvQU0gU2FtdWVsIEhvbGxhbmQKPiA8c2FtdWVsLmhv bGxhbmRAc2lmaXZlLmNvbT4gd3JvdGU6Cj4+Cj4+IFRoZSBpbnRlcmZhY2UgZm9yIGNvbnRyb2xs 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and Ssnpm extensions for guests To: Anup Patel Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Catalin Marinas , linux-kernel@vger.kernel.org, Anup Patel , Conor Dooley , kasan-dev@googlegroups.com, Atish Patra , Evgenii Stepanov , Krzysztof Kozlowski , Rob Herring , "Kirill A . Shutemov" , kvm-riscv@lists.infradead.org References: <20240829010151.2813377-1-samuel.holland@sifive.com> <20240829010151.2813377-10-samuel.holland@sifive.com> Content-Language: en-US From: Samuel Holland In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi Anup, On 2024-09-04 7:17 AM, Anup Patel wrote: > On Thu, Aug 29, 2024 at 6:32 AM Samuel Holland > wrote: >> >> The interface for controlling pointer masking in VS-mode is henvcfg.PMM, >> which is part of the Ssnpm extension, even though pointer masking in >> HS-mode is provided by the Smnpm extension. As a result, emulating Smnpm >> in the guest requires (only) Ssnpm on the host. >> >> Since the guest configures Smnpm through the SBI Firmware Features >> interface, the extension can be disabled by failing the SBI call. Ssnpm >> cannot be disabled without intercepting writes to the senvcfg CSR. >> >> Signed-off-by: Samuel Holland >> --- >> >> (no changes since v2) >> >> Changes in v2: >> - New patch for v2 >> >> arch/riscv/include/uapi/asm/kvm.h | 2 ++ >> arch/riscv/kvm/vcpu_onereg.c | 3 +++ >> 2 files changed, 5 insertions(+) >> >> diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h >> index e97db3296456..4f24201376b1 100644 >> --- a/arch/riscv/include/uapi/asm/kvm.h >> +++ b/arch/riscv/include/uapi/asm/kvm.h >> @@ -175,6 +175,8 @@ enum KVM_RISCV_ISA_EXT_ID { >> KVM_RISCV_ISA_EXT_ZCF, >> KVM_RISCV_ISA_EXT_ZCMOP, >> KVM_RISCV_ISA_EXT_ZAWRS, >> + KVM_RISCV_ISA_EXT_SMNPM, >> + KVM_RISCV_ISA_EXT_SSNPM, >> KVM_RISCV_ISA_EXT_MAX, >> }; >> >> diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c >> index b319c4c13c54..6f833ec2344a 100644 >> --- a/arch/riscv/kvm/vcpu_onereg.c >> +++ b/arch/riscv/kvm/vcpu_onereg.c >> @@ -34,9 +34,11 @@ static const unsigned long kvm_isa_ext_arr[] = { >> [KVM_RISCV_ISA_EXT_M] = RISCV_ISA_EXT_m, >> [KVM_RISCV_ISA_EXT_V] = RISCV_ISA_EXT_v, >> /* Multi letter extensions (alphabetically sorted) */ >> + [KVM_RISCV_ISA_EXT_SMNPM] = RISCV_ISA_EXT_SSNPM, > > Why not use KVM_ISA_EXT_ARR() macro here ? Because the extension name in the host does not match the extension name in the guest. Pointer masking for HS mode is provided by Smnpm. Pointer masking for VS mode is provided by Ssnpm at the hardware level, but this needs to appear to the guest as if Smnpm was implemented, since the guest thinks it is running on bare metal. >> KVM_ISA_EXT_ARR(SMSTATEEN), >> KVM_ISA_EXT_ARR(SSAIA), >> KVM_ISA_EXT_ARR(SSCOFPMF), >> + KVM_ISA_EXT_ARR(SSNPM), >> KVM_ISA_EXT_ARR(SSTC), >> KVM_ISA_EXT_ARR(SVINVAL), >> KVM_ISA_EXT_ARR(SVNAPOT), >> @@ -129,6 +131,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) >> case KVM_RISCV_ISA_EXT_M: >> /* There is not architectural config bit to disable sscofpmf completely */ >> case KVM_RISCV_ISA_EXT_SSCOFPMF: >> + case KVM_RISCV_ISA_EXT_SSNPM: > > Why not add KVM_RISCV_ISA_EXT_SMNPM here ? > > Disabling Smnpm from KVM user space is very different from > disabling Smnpm from Guest using SBI FWFT extension. Until a successful SBI FWFT call to KVM to enable pointer masking for VS mode, the existence of Smnpm has no visible effect on the guest. So failing the SBI call is sufficient to pretend that the hardware does not support Smnpm. > The KVM user space should always add Smnpm in the > Guest ISA string whenever the Host ISA string has it. I disagree. Allowing userspace to disable extensions is useful for testing and to support migration to hosts which do not support those extensions. So I would only add extensions to this list if there is no possible way to disable them. > The Guest must explicitly use SBI FWFT to enable > Smnpm only after it sees Smnpm in ISA string. Yes, exactly, and the purpose of not including Smnpm in the switch case here is so that KVM user space can control whether or not it appears in the ISA string. Regards, Samuel >> case KVM_RISCV_ISA_EXT_SSTC: >> case KVM_RISCV_ISA_EXT_SVINVAL: >> case KVM_RISCV_ISA_EXT_SVNAPOT: >> -- >> 2.45.1 >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv > > Regards, > Anup