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OjE0OiBlcnJvcjogY29tcGFyaXNvbiBvZiB1bnNpZ25lZCBleHByZXNzaW9uID49IDAgaXMgYWx3 YXlzIHRydWUgWy1XZXJyb3I9dHlwZS1saW1pdHNdCj4+PiAgICByZXR1cm4gKHZhbCA+PSBJRF9B QTY0TU1GUjBfVEdSQU40X1NVUFBPUlRFRF9NSU4pICYmCj4+PiAgICAgICAgICAgICAgICBefgo+ Pj4gLi9hcmNoL2FybTY0L2luY2x1ZGUvYXNtL2NwdWZlYXR1cmUuaDogSW4gZnVuY3Rpb24gJ3N5 c3RlbV9zdXBwb3J0c182NGtiX2dyYW51bGUnOgo+Pj4gLi9hcmNoL2FybTY0L2luY2x1ZGUvYXNt L2NwdWZlYXR1cmUuaDo2NjY6MTQ6IGVycm9yOiBjb21wYXJpc29uIG9mIHVuc2lnbmVkIGV4cHJl c3Npb24gPj0gMCBpcyBhbHdheXMgdHJ1ZSBbLVdlcnJvcj10eXBlLWxpbWl0c10KPj4+ICAgIHJl dHVybiAodmFsID49IElEX0FBNjRNTUZSMF9UR1JBTjY0X1NVUFBPUlRFRF9NSU4pICYmCj4+PiAg ICAgICAgICAgICAgICBefgo+IFRoZSB1c2VmdWxuZXNzIG9mIHRoaXMgZGlhZ25vc3RpYyBpcyBk ZWJhdGFibGUgZXZlbiB3aGVuIHRoZSByaWdodAo+IGhhbmQgaXMgYSBsaXRlcmFsICcwJyBidXQg d2FybmluZyBhYm91dCBzeW1ib2xpYyBjb25zdGFudHMgbGlrZSB0aGlzCj4gaXMgYWN0aXZlbHkg ZXZpbC4KPgo+IEluIGdlbmVyYWwsIHByZXByb2Nlc3NvciAjZGVmaW5lZCB2YWx1ZXMgY2FuIGRl cGVuZCBvbiBLY29uZmlnCj4gc2V0dGluZ3Mgb3Igb3RoZXIgYnVpbGQgY29uZmlndXJhdGlvbiBz d2l0Y2hlcywgYW5kIHRoaXMgd2FybmluZwo+IGVuY291cmFnZXMgdXMgdG8gcmVtb3ZlIHRoZSBl eHByZXNzaW9uIGFsdG9nZXRoZXIsIHdoaWNoIGNvdWxkIG1lYW4KPiBpbnRyb2R1Y2luZyBhIGJ1 ZyBpZiB0aGUgbWFjcm8gbWF5IGFzc3VtZSB2YWx1ZXMgPjAgaW4gb3RoZXIKPiBjb25maWd1cmF0 aW9ucy4KPgo+IEVyZ28sIHdlIG11c3QgaWdub3JlIC1XdHlwZS1saW1pdHMgdW50aWwgaXQgaXMg Zml4ZWQsIGFuZCBjYW4gYXQgbGVhc3QKPiBkaXN0aW5ndWlzaCBsaXRlcmFsIDAgY29uc3RhbnRz IGZyb20gb25lcyBpbnN0YW50aWF0ZWQgYnkgYSBDUFAgbWFjcm8uCj4KPgo+PiBXaGVuIGlzIHRo ZSBgLVdlcnJvcj10eXBlLWxpbWl0c2AgZmxhZyBlbmFibGVkIGJ5IHRoZSBidWlsZCBzeXN0ZW0/ Cj4+Cj4+IFdlIGhhdmUgcGF0dGVybnMgbGlrZSB0aGlzIGFsbCBvdmVyIHRoZSBrZXJuZWwsIGFu ZCBJIGRvbid0IHRoaW5rIHRoaXMgaXMKPj4gaW5kaWNhdGl2ZSBvZiBhIHJlYWwgcHJvYmxlbSwg YW5kIEkgZG9uJ3QgdGhpbmsgdGhhdCB3ZSBuZWVkIHRvIGNoYW5nZSBjb2RlIHRvCj4+IG1ha2Ug dGhpcyB3YXJuaW5nIGRpc2FwcGVhci4KPj4KPj4+IE1vZGlmeSB0aGUgcmV0dXJuIGp1ZGdtZW50 IHN0YXRlbWVudCwgdXNlCj4+PiAiKCh2YWwgLSBtaW4pIDwgKHZhbCAtIG1heCAtIDEpKSIgdG8g Y29uZmlybSB0aGF0IHJldHVybnMKPj4+IHRydWUgaW4g4oCcbWluIDw9IHZhbCA8PSBtYXjigJ0g Y2FzZXMsIGZhbHNlIGluIG90aGVyIGNhc2VzLgo+PiBUaGF0IGV4cHJlc3Npb24gaXMgZmFyIGxl c3MgY2xlYXIgdGhhbiB0aGUgZXhpc3RpbmcgY29kZSwgc28gSSBkbyBub3QgdGhpbmsKPj4gdGhh dCBpcyBhIGdvb2QgaWRlYS4KPj4KPj4+IEZpeGVzOiA3OWQ4MmNiY2JiM2QgKCJhcm02NC9rZXhl YzogVGVzdCBwYWdlIHNpemUgc3VwcG9ydCB3aXRoIG5ldyBUR1JBTiByYW5nZSB2YWx1ZXMiKQo+ PiBXaGF0IGZ1bmN0aW9uYWwgZXJyb3IgZG9lcyB0aGlzIGZpeD8KPj4KPj4gV2hhdCBjb25maWd1 cmF0aW9uIGlzIGJyb2tlbj8KPj4KPj4gVGhhbmtzLAo+PiBNYXJrLgo+Pgo+Pj4gU2lnbmVkLW9m Zi1ieTogTGluIFl1anVuIDxsaW55dWp1bjgwOUBodWF3ZWkuY29tPgo+Pj4gLS0tCj4+PiAgIGFy Y2gvYXJtNjQvaW5jbHVkZS9hc20vY3B1ZmVhdHVyZS5oIHwgMTggKysrKysrKysrKysrLS0tLS0t Cj4+PiAgIDEgZmlsZSBjaGFuZ2VkLCAxMiBpbnNlcnRpb25zKCspLCA2IGRlbGV0aW9ucygtKQo+ Pj4KPj4+IGRpZmYgLS1naXQgYS9hcmNoL2FybTY0L2luY2x1ZGUvYXNtL2NwdWZlYXR1cmUuaCBi L2FyY2gvYXJtNjQvaW5jbHVkZS9hc20vY3B1ZmVhdHVyZS5oCj4+PiBpbmRleCAwM2QxYzlkN2Fm ODIuLjBhNmJkYTAyNTE0MSAxMDA2NDQKPj4+IC0tLSBhL2FyY2gvYXJtNjQvaW5jbHVkZS9hc20v Y3B1ZmVhdHVyZS5oCj4+PiArKysgYi9hcmNoL2FybTY0L2luY2x1ZGUvYXNtL2NwdWZlYXR1cmUu aAo+Pj4gQEAgLTU0LDYgKzU0LDkgQEAgZW51bSBmdHJfdHlwZSB7Cj4+PiAgICNkZWZpbmUgRlRS X1ZJU0lCTEVfSUZfSVNfRU5BQkxFRChjb25maWcpICAgICAgICAgICAgXAo+Pj4gICAgICAgIChJ U19FTkFCTEVEKGNvbmZpZykgPyBGVFJfVklTSUJMRSA6IEZUUl9ISURERU4pCj4+Pgo+Pj4gKyNk ZWZpbmUgSU5fUkFOR0VfSU5DTFVTSVZFKHZhbCwgbWluLCBtYXgpICAgICAgICAgICAgXAo+Pj4g KyAgICAgKCgodmFsKSAtIChtaW4pKSA8ICgodmFsKSAtIChtYXgpIC0gMSkpCj4+PiArCj4+PiAg IHN0cnVjdCBhcm02NF9mdHJfYml0cyB7Cj4+PiAgICAgICAgYm9vbCAgICAgICAgICAgIHNpZ247 ICAgLyogVmFsdWUgaXMgc2lnbmVkID8gKi8KPj4+ICAgICAgICBib29sICAgICAgICAgICAgdmlz aWJsZTsKPj4+IEBAIC02OTMsOCArNjk2LDkgQEAgc3RhdGljIGlubGluZSBib29sIHN5c3RlbV9z dXBwb3J0c180a2JfZ3JhbnVsZSh2b2lkKQo+Pj4gICAgICAgIHZhbCA9IGNwdWlkX2ZlYXR1cmVf ZXh0cmFjdF91bnNpZ25lZF9maWVsZChtbWZyMCwKPj4+ICAgICAgICAgICAgICAgICAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgSURfQUE2NE1NRlIwX0VMMV9UR1JBTjRfU0hJRlQpOwo+ Pj4KPj4+IC0gICAgIHJldHVybiAodmFsID49IElEX0FBNjRNTUZSMF9FTDFfVEdSQU40X1NVUFBP UlRFRF9NSU4pICYmCj4+PiAtICAgICAgICAgICAgKHZhbCA8PSBJRF9BQTY0TU1GUjBfRUwxX1RH UkFONF9TVVBQT1JURURfTUFYKTsKPj4+ICsgICAgIHJldHVybiBJTl9SQU5HRV9JTkNMVVNJVkUo dmFsLAo+Pj4gKyAgICAgICAgICAgICBJRF9BQTY0TU1GUjBfRUwxX1RHUkFONF9TVVBQT1JURURf TUlOLAo+Pj4gKyAgICAgICAgICAgICBJRF9BQTY0TU1GUjBfRUwxX1RHUkFONF9TVVBQT1JURURf TUFYKTsKPj4+ICAgfQo+Pj4KPj4+ICAgc3RhdGljIGlubGluZSBib29sIHN5c3RlbV9zdXBwb3J0 c182NGtiX2dyYW51bGUodm9pZCkKPj4+IEBAIC03MDYsOCArNzEwLDkgQEAgc3RhdGljIGlubGlu ZSBib29sIHN5c3RlbV9zdXBwb3J0c182NGtiX2dyYW51bGUodm9pZCkKPj4+ICAgICAgICB2YWwg PSBjcHVpZF9mZWF0dXJlX2V4dHJhY3RfdW5zaWduZWRfZmllbGQobW1mcjAsCj4+PiAgICAgICAg ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIElEX0FBNjRNTUZSMF9FTDFf VEdSQU42NF9TSElGVCk7Cj4+Pgo+Pj4gLSAgICAgcmV0dXJuICh2YWwgPj0gSURfQUE2NE1NRlIw X0VMMV9UR1JBTjY0X1NVUFBPUlRFRF9NSU4pICYmCj4+PiAtICAgICAgICAgICAgKHZhbCA8PSBJ RF9BQTY0TU1GUjBfRUwxX1RHUkFONjRfU1VQUE9SVEVEX01BWCk7Cj4+PiArICAgICByZXR1cm4g SU5fUkFOR0VfSU5DTFVTSVZFKHZhbCwKPj4+ICsgICAgICAgICAgICAgSURfQUE2NE1NRlIwX0VM MV9UR1JBTjY0X1NVUFBPUlRFRF9NSU4sCj4+PiArICAgICAgICAgICAgIElEX0FBNjRNTUZSMF9F TDFfVEdSQU42NF9TVVBQT1JURURfTUFYKTsKPj4+ICAgfQo+Pj4KPj4+ICAgc3RhdGljIGlubGlu ZSBib29sIHN5c3RlbV9zdXBwb3J0c18xNmtiX2dyYW51bGUodm9pZCkKPj4+IEBAIC03MTksOCAr NzI0LDkgQEAgc3RhdGljIGlubGluZSBib29sIHN5c3RlbV9zdXBwb3J0c18xNmtiX2dyYW51bGUo dm9pZCkKPj4+ICAgICAgICB2YWwgPSBjcHVpZF9mZWF0dXJlX2V4dHJhY3RfdW5zaWduZWRfZmll bGQobW1mcjAsCj4+PiAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgICAg ICAgIElEX0FBNjRNTUZSMF9FTDFfVEdSQU4xNl9TSElGVCk7Cj4+Pgo+Pj4gLSAgICAgcmV0dXJu ICh2YWwgPj0gSURfQUE2NE1NRlIwX0VMMV9UR1JBTjE2X1NVUFBPUlRFRF9NSU4pICYmCj4+PiAt ICAgICAgICAgICAgKHZhbCA8PSBJRF9BQTY0TU1GUjBfRUwxX1RHUkFOMTZfU1VQUE9SVEVEX01B WCk7Cj4+PiArICAgICByZXR1cm4gSU5fUkFOR0VfSU5DTFVTSVZFKHZhbCwKPj4+ICsgICAgICAg ICAgICAgSURfQUE2NE1NRlIwX0VMMV9UR1JBTjE2X1NVUFBPUlRFRF9NSU4sCj4+PiArICAgICAg ICAgICAgIElEX0FBNjRNTUZSMF9FTDFfVEdSQU4xNl9TVVBQT1JURURfTUFYKTsKPj4+ICAgfQo+ Pj4KPj4+ICAgc3RhdGljIGlubGluZSBib29sIHN5c3RlbV9zdXBwb3J0c19taXhlZF9lbmRpYW5f ZWwwKHZvaWQpCj4+PiAtLQo+Pj4gMi4zNC4xCj4+Pgo+IC4KCl9fX19fX19fX19fX19fX19fX19f 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ESMTPS id A6C6A29161 for ; Tue, 21 Feb 2023 23:08:28 -0800 (PST) Received: from kwepemi500026.china.huawei.com (unknown [172.30.72.53]) by szxga02-in.huawei.com (SkyGuard) with ESMTP id 4PM6dY3m1XzKpx7; Wed, 22 Feb 2023 15:06:25 +0800 (CST) Received: from [10.67.111.232] (10.67.111.232) by kwepemi500026.china.huawei.com (7.221.188.247) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.6; Wed, 22 Feb 2023 15:08:17 +0800 Message-ID: Date: Wed, 22 Feb 2023 15:08:16 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH -next] arm64: Optimize the comparison of unsigned expressions to avoid compiling error To: Ard Biesheuvel , Mark Rutland CC: , , , , , , , , , , , , , References: <20230221012740.2929481-1-linyujun809@huawei.com> From: "linyujun (C)" In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.67.111.232] X-ClientProxiedBy: dggems704-chm.china.huawei.com (10.3.19.181) To kwepemi500026.china.huawei.com (7.221.188.247) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Thanks for your advice 在 2023/2/21 23:10, Ard Biesheuvel 写道: > On Tue, 21 Feb 2023 at 11:37, Mark Rutland wrote: >> On Tue, Feb 21, 2023 at 09:27:40AM +0800, Lin Yujun wrote: >>> while compile arch/arm64/include/asm/cpufeature.h with >>> -Werror=type-limits enabled, errors shown as below: >>> >>> ./arch/arm64/include/asm/cpufeature.h: In function 'system_supports_4kb_granule': >>> ./arch/arm64/include/asm/cpufeature.h:653:14: error: comparison of unsigned expression >= 0 is always true [-Werror=type-limits] >>> return (val >= ID_AA64MMFR0_TGRAN4_SUPPORTED_MIN) && >>> ^~ >>> ./arch/arm64/include/asm/cpufeature.h: In function 'system_supports_64kb_granule': >>> ./arch/arm64/include/asm/cpufeature.h:666:14: error: comparison of unsigned expression >= 0 is always true [-Werror=type-limits] >>> return (val >= ID_AA64MMFR0_TGRAN64_SUPPORTED_MIN) && >>> ^~ > The usefulness of this diagnostic is debatable even when the right > hand is a literal '0' but warning about symbolic constants like this > is actively evil. > > In general, preprocessor #defined values can depend on Kconfig > settings or other build configuration switches, and this warning > encourages us to remove the expression altogether, which could mean > introducing a bug if the macro may assume values >0 in other > configurations. > > Ergo, we must ignore -Wtype-limits until it is fixed, and can at least > distinguish literal 0 constants from ones instantiated by a CPP macro. > > >> When is the `-Werror=type-limits` flag enabled by the build system? >> >> We have patterns like this all over the kernel, and I don't think this is >> indicative of a real problem, and I don't think that we need to change code to >> make this warning disappear. >> >>> Modify the return judgment statement, use >>> "((val - min) < (val - max - 1))" to confirm that returns >>> true in “min <= val <= max” cases, false in other cases. >> That expression is far less clear than the existing code, so I do not think >> that is a good idea. >> >>> Fixes: 79d82cbcbb3d ("arm64/kexec: Test page size support with new TGRAN range values") >> What functional error does this fix? >> >> What configuration is broken? >> >> Thanks, >> Mark. >> >>> Signed-off-by: Lin Yujun >>> --- >>> arch/arm64/include/asm/cpufeature.h | 18 ++++++++++++------ >>> 1 file changed, 12 insertions(+), 6 deletions(-) >>> >>> diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h >>> index 03d1c9d7af82..0a6bda025141 100644 >>> --- a/arch/arm64/include/asm/cpufeature.h >>> +++ b/arch/arm64/include/asm/cpufeature.h >>> @@ -54,6 +54,9 @@ enum ftr_type { >>> #define FTR_VISIBLE_IF_IS_ENABLED(config) \ >>> (IS_ENABLED(config) ? FTR_VISIBLE : FTR_HIDDEN) >>> >>> +#define IN_RANGE_INCLUSIVE(val, min, max) \ >>> + (((val) - (min)) < ((val) - (max) - 1)) >>> + >>> struct arm64_ftr_bits { >>> bool sign; /* Value is signed ? */ >>> bool visible; >>> @@ -693,8 +696,9 @@ static inline bool system_supports_4kb_granule(void) >>> val = cpuid_feature_extract_unsigned_field(mmfr0, >>> ID_AA64MMFR0_EL1_TGRAN4_SHIFT); >>> >>> - return (val >= ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MIN) && >>> - (val <= ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MAX); >>> + return IN_RANGE_INCLUSIVE(val, >>> + ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MIN, >>> + ID_AA64MMFR0_EL1_TGRAN4_SUPPORTED_MAX); >>> } >>> >>> static inline bool system_supports_64kb_granule(void) >>> @@ -706,8 +710,9 @@ static inline bool system_supports_64kb_granule(void) >>> val = cpuid_feature_extract_unsigned_field(mmfr0, >>> ID_AA64MMFR0_EL1_TGRAN64_SHIFT); >>> >>> - return (val >= ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MIN) && >>> - (val <= ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MAX); >>> + return IN_RANGE_INCLUSIVE(val, >>> + ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MIN, >>> + ID_AA64MMFR0_EL1_TGRAN64_SUPPORTED_MAX); >>> } >>> >>> static inline bool system_supports_16kb_granule(void) >>> @@ -719,8 +724,9 @@ static inline bool system_supports_16kb_granule(void) >>> val = cpuid_feature_extract_unsigned_field(mmfr0, >>> ID_AA64MMFR0_EL1_TGRAN16_SHIFT); >>> >>> - return (val >= ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MIN) && >>> - (val <= ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MAX); >>> + return IN_RANGE_INCLUSIVE(val, >>> + ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MIN, >>> + ID_AA64MMFR0_EL1_TGRAN16_SUPPORTED_MAX); >>> } >>> >>> static inline bool system_supports_mixed_endian_el0(void) >>> -- >>> 2.34.1 >>> > .