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charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.3 (3.52.3-1.fc40app2) MIME-Version: 1.0 On Tue, 2024-07-23 at 12:02 +0200, Jan Beulich wrote: > On 23.07.2024 10:55, oleksii.kurochko@gmail.com=C2=A0wrote: > > On Tue, 2024-07-23 at 10:36 +0200, Jan Beulich wrote: > > > On 23.07.2024 10:02, Oleksii Kurochko wrote: > > > > On Mon, Jul 22, 2024 at 7:27=E2=80=AFPM Julien Grall > > > > wrote: > > > > > > > On 22/07/2024 15:44, Oleksii Kurochko wrote: > > > > > > =C2=A0=C2=A0=C2=A0 /* Map a 4k page in a fixmap entry */ > > > > > > =C2=A0=C2=A0=C2=A0 void set_fixmap(unsigned map, mfn_t mfn, uns= igned int > > > > > > flags) > > > > > > =C2=A0=C2=A0=C2=A0 { > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pte_t pte; > > > > > >=20 > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pte =3D mfn_to_xen_e= ntry(mfn, flags); > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pte.pte |=3D PTE_LEA= F_DEFAULT; > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 write_pte(&xen_fixma= p[pt_index(0, > > > > > > FIXMAP_ADDR(map))], > > > > > > pte); > > > > >=20 > > > > > It would be saner to check if you are not overwriting any > > > > > existing > > > > > mapping as otherwise you will probably need a TLB flush. > > > > >=20 > > > > > > =C2=A0=C2=A0=C2=A0 } > > > > > >=20 > > > > > > =C2=A0=C2=A0=C2=A0 /* Remove a mapping from a fixmap entry */ > > > > > > =C2=A0=C2=A0=C2=A0 void clear_fixmap(unsigned map) > > > > > > =C2=A0=C2=A0=C2=A0 { > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 pte_t pte =3D {0}; > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 write_pte(&xen_fixma= p[pt_index(0, > > > > > > FIXMAP_ADDR(map))], > > > > > > pte); > > > > >=20 > > > > > Don't you need a TLB flush? > > > > >=20 > > > > Inside write_pte() there is "sfence.vma". > > >=20 > > > That's just a fence though, not a TLB flush. > > From the privileged doc: > > =C2=A0=C2=A0 ``` > > =C2=A0=C2=A0 SFENCE.VMA is also used to invalidate entries in the > > =C2=A0=C2=A0 address-translation cache associated with a hart (see Sect= ion > > 4.3.2).=20 > > =C2=A0=C2=A0 ... > > =C2=A0=C2=A0 The SFENCE.VMA is used to flush any local hardware caches > > related to > > =C2=A0=C2=A0 address translation. > > =C2=A0=C2=A0 It is specified as a fence rather than a TLB flush to prov= ide > > cleaner > > =C2=A0=C2=A0 semantics with respect to > > =C2=A0=C2=A0 which instructions are affected by the flush operation and= to > > support a > > =C2=A0=C2=A0 wider variety of dynamic > > =C2=A0=C2=A0 caching structures and memory-management schemes. SFENCE.V= MA is > > also > > =C2=A0=C2=A0 used by higher > > =C2=A0=C2=A0 privilege levels to synchronize page table writes and the > > address > > =C2=A0=C2=A0 translation hardware. > > =C2=A0=C2=A0 ... > > =C2=A0=C2=A0 ``` > > I read this as SFENCE.VMA is used not only for ordering of > > load/stores, > > but also to flush TLB ( which is a type of more general term as > > address-translation cache, IIUIC ). >=20 > Oh, I see. Kind of unexpected for an instruction of that name. Yet > note > how they talk about the local hart only. You need a wider scope TLB > flush here. Could you please clarify why it is needed wider? Arm Xen flushed only local TLB. RISC-V Linux kernel for fixmap also uses: local_flush_tlb_page(). ~ Oleksii