Re: [dpdk-dev] [PATCH] net/i40e: fix FDIR issue for ETH + VLAN pattern

["Guo, Jia" <jia.guo@intel.com>]

> -----Original Message-----
> From: Xing, Beilei <beilei.xing@intel.com>
> Sent: Friday, October 23, 2020 4:15 PM
> To: dev@dpdk.org
> Cc: Guo, Jia <jia.guo@intel.com>; Xing, Beilei <beilei.xing@intel.com>;
> stable@dpdk.org
> Subject: [PATCH] net/i40e: fix FDIR issue for ETH + VLAN pattern
> 
> From: Beilei Xing <beilei.xing@intel.com>
> 
> Currently, can't create more than one following flow for ETH + VLAN pattern:
> 
> > flow create 0 ingress pattern eth / vlan vid is 350 / end
> actions queue index 2 / end
> 
> The root cause is the keys of all such flows are the same.
> 

Create more same flow or different flow? Why the same key relate with below code change.
Suggest better to make it more clear for readable. Thanks.

> Fixes: 42044b69c67d ("net/i40e: support input set selection for FDIR")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Beilei Xing <beilei.xing@intel.com>
> ---
>  drivers/net/i40e/i40e_flow.c | 23 ++++++++++++++++++-----
>  1 file changed, 18 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
> index adc5da1c53..60043322a1 100644
> --- a/drivers/net/i40e/i40e_flow.c
> +++ b/drivers/net/i40e/i40e_flow.c
> @@ -28,6 +28,9 @@
>  #define I40E_IPV6_FRAG_HEADER	44
>  #define I40E_TENANT_ARRAY_NUM	3
>  #define I40E_TCI_MASK		0xFFFF
> +#define I40E_PRI_MASK		0xE000
> +#define I40E_CFI_MASK		0x1000
> +#define I40E_VID_MASK		0x0FFF
> 

Should below are better to show that tci involve the others when use these mask?

 +#define I40E_TCI_PRI_MASK		0xE000
 +#define I40E_TCI_CFI_MASK		0x1000
 +#define I40E_TCI_VID_MASK		0x0FFF

>  static int i40e_flow_validate(struct rte_eth_dev *dev,
>  			      const struct rte_flow_attr *attr, @@ -2705,12
> +2708,22 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev,
> 
>  			RTE_ASSERT(!(input_set &
> I40E_INSET_LAST_ETHER_TYPE));
>  			if (vlan_spec && vlan_mask) {
> -				if (vlan_mask->tci ==
> -				    rte_cpu_to_be_16(I40E_TCI_MASK)) {
> -					input_set |=
> I40E_INSET_VLAN_INNER;
> -					filter->input.flow_ext.vlan_tci =
> -						vlan_spec->tci;
> +				if (vlan_mask->tci !=
> +				    rte_cpu_to_be_16(I40E_TCI_MASK) &&
> +				    vlan_mask->tci !=
> +				    rte_cpu_to_be_16(I40E_PRI_MASK) &&
> +				    vlan_mask->tci !=
> +				    rte_cpu_to_be_16(I40E_CFI_MASK) &&
> +				    vlan_mask->tci !=
> +				    rte_cpu_to_be_16(I40E_VID_MASK)) {
> +					rte_flow_error_set(error, EINVAL,
> +
> RTE_FLOW_ERROR_TYPE_ITEM,
> +						   item,
> +						   "Unsupported TCI mask.");
>  				}
> +				input_set |= I40E_INSET_VLAN_INNER;
> +				filter->input.flow_ext.vlan_tci =
> +					vlan_spec->tci;
>  			}
>  			if (vlan_spec && vlan_mask && vlan_mask-
> >inner_type) {
>  				if (vlan_mask->inner_type !=
> RTE_BE16(0xffff)) {
> --
> 2.26.2