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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fe5de4de4sm45838335e9.8.2026.09.23.23.42.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Sep 2026 23:42:52 -0700 (PDT) Message-ID: Date: Thu, 24 Sep 2026 08:42:50 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 13/26] target/arm/kvm: Introduce kvm_arm_expose_idreg_properties Content-Language: en-US To: Khushit Shah Cc: "eric.auger.pro@gmail.com" , "qemu-devel@nongnu.org" , "qemu-arm@nongnu.org" , "kvmarm@lists.linux.dev" , "peter.maydell@linaro.org" , Shaju Abraham , "yangjinqian1@huawei.com" , "cohuck@redhat.com" , "richard.henderson@linaro.org" , "sebott@redhat.com" , "skolothumtho@nvidia.com" , "philmd@oss.qualcomm.com" , "maz@kernel.org" , "oliver.upton@linux.dev" , "pbonzini@redhat.com" , "armbru@redhat.com" , "berrange@redhat.com" , "abologna@redhat.com" , "jdenemar@redhat.com" References: <20260916144721.751810-1-eric.auger@redhat.com> <20260916144721.751810-14-eric.auger@redhat.com> <67EB28E9-F8CE-4BE1-8712-88583DEFF24E@nutanix.com> From: Eric Auger In-Reply-To: <67EB28E9-F8CE-4BE1-8712-88583DEFF24E@nutanix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Khushit, On 9/24/26 8:26 AM, Khushit Shah wrote: > >> On 16 Sep 2026, at 8:15 PM, Eric Auger wrote: >> >> + >> +/* >> + * decode_idreg_writemap: Generate props for writable fields >> + * >> + * @obj: CPU object >> + * @reg: description of the sysreg >> + */ >> +static int >> +decode_idreg_writemap(Object *obj, ARM64SysReg *reg) >> +{ >> + uint64_t map = reg->writable_mask; >> + int i = ctz64(map); >> + int nb_sysreg_props = 0; >> + >> + while (map) { >> + ARM64SysRegField *field = get_field(i, reg); >> + int lower, upper; >> + char *prop_name; >> + uint64_t field_mask; >> + >> + if (!field) { >> + warn_report("%s bit %d of %s is writable but no named field " >> + "in target/arm/cpu-idregs.h.inc", >> + __func__, i, reg->name); >> + map = map & ~BIT_ULL(i); >> + i = ctz64(map); >> + continue; >> + } >> + lower = field->shift; >> + upper = field->shift + field->length - 1; >> + prop_name = g_strdup_printf("SYSREG_%s_%s", reg->name, field->name); >> + trace_decode_idreg_writemap(field->name, lower, upper, prop_name); >> + object_property_add(obj, prop_name, "uint64", >> + get_sysreg_prop, set_sysreg_prop, NULL, field); >> + g_free(prop_name); >> + nb_sysreg_props++; >> + >> + field_mask = MAKE_64BIT_MASK(lower, field->length); >> + map = map & ~field_mask; >> + i = ctz64(map); >> + } >> + trace_nb_sysreg_props(reg->name, nb_sysreg_props); >> + return 0; >> +} >> + > We can try field based handling, it is more elegant. > - for each field, check if not RES and writable. I guess you refer to what you did in  [RFC PATCH v4 02/25] target/arm: expose all non-res ID reg fields as properties ie. enumerate through all reg->fields[] array instead of parsing the writable bitmask. Yes I agree your implementation is simpler. We can still implement checks against writable masks if wanted. > > Let's discuss that separately. This function could be enhanced to support both modes anyway. Thanks Eric > > >