From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: Ethan Chen <ethan84@andestech.com>, qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org, pbonzini@redhat.com,
peterx@redhat.com, david@redhat.com, philmd@linaro.org,
palmer@dabbelt.com, alistair.francis@wdc.com, bmeng.cn@gmail.com,
liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com,
qemu-riscv@nongnu.org
Subject: Re: [PATCH v8 0/8] Support RISC-V IOPMP
Date: Tue, 5 Nov 2024 15:36:07 -0300 [thread overview]
Message-ID: <b8e239d2-e0d5-4cac-a074-cb1ed277a08a@ventanamicro.com> (raw)
In-Reply-To: <20240715095702.1222213-1-ethan84@andestech.com>
Hi Ethan,
Do you plan to send a new version of this work? It seems to me that we're
a couple of reviews away from getting it merged.
Thanks,
Daniel
On 7/15/24 6:56 AM, Ethan Chen wrote:
> This series implements basic functions of IOPMP specification v0.9.1 rapid-k
> model.
> The specification url:
> https://github.com/riscv-non-isa/iopmp-spec/releases/tag/v0.9.1
>
> When IOPMP is enabled, memory access to system memory from devices and
> the CPU will be checked by the IOPMP.
>
> The issue of CPU access to non-CPU address space via IOMMU was previously
> mentioned by Jim Shu, who provided a patch[1] to fix it. IOPMP also requires
> this patch.
>
> [1] accel/tcg: Store section pointer in CPUTLBEntryFull
> https://patchew.org/QEMU/20240612081416.29704-1-jim.shu@sifive.com/20240612081416.29704-2-jim.shu@sifive.com/
>
>
> Changes for v8:
>
> - Support transactions from CPU
> - Add an API to set up IOPMP protection for system memory
> - Add an API to configure the RISCV CPU to support IOPMP and specify the
> CPU's RRID
> - Add an API for DMA operation with IOPMP support
> - Add SPDX license identifiers to new files (Stefan W.)
> - Remove IOPMP PCI interface(pci_setup_iommu) (Zhiwei)
>
> Changes for v7:
>
> - Change the specification version to v0.9.1
> - Remove the sps extension
> - Remove stall support, transaction information which need requestor device
> support.
> - Remove iopmp_cascade option for virt machine
> - Refine 'addr' range checks switch case (Daniel)
>
> Ethan Chen (8):
> memory: Introduce memory region fetch operation
> system/physmem: Support IOMMU granularity smaller than TARGET_PAGE
> size
> target/riscv: Add support for IOPMP
> hw/misc/riscv_iopmp: Add RISC-V IOPMP device
> hw/misc/riscv_iopmp: Add API to set up IOPMP protection for system
> memory
> hw/misc/riscv_iopmp: Add API to configure RISCV CPU IOPMP support
> hw/misc/riscv_iopmp: Add DMA operation with IOPMP support API
> hw/riscv/virt: Add IOPMP support
>
> accel/tcg/cputlb.c | 29 +-
> docs/system/riscv/virt.rst | 5 +
> hw/misc/Kconfig | 3 +
> hw/misc/meson.build | 1 +
> hw/misc/riscv_iopmp.c | 1289 +++++++++++++++++++++++++++++++++
> hw/misc/trace-events | 3 +
> hw/riscv/Kconfig | 1 +
> hw/riscv/virt.c | 63 ++
> include/exec/memory.h | 30 +
> include/hw/misc/riscv_iopmp.h | 173 +++++
> include/hw/riscv/virt.h | 5 +-
> system/memory.c | 104 +++
> system/physmem.c | 4 +
> system/trace-events | 2 +
> target/riscv/cpu_cfg.h | 2 +
> target/riscv/cpu_helper.c | 18 +-
> 16 files changed, 1722 insertions(+), 10 deletions(-)
> create mode 100644 hw/misc/riscv_iopmp.c
> create mode 100644 include/hw/misc/riscv_iopmp.h
>
next prev parent reply other threads:[~2024-11-05 18:36 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-15 9:56 [PATCH v8 0/8] Support RISC-V IOPMP Ethan Chen via
2024-07-15 9:56 ` Ethan Chen via
2024-07-15 9:56 ` [PATCH v8 1/8] memory: Introduce memory region fetch operation Ethan Chen via
2024-07-15 9:56 ` Ethan Chen via
2024-07-15 9:56 ` [PATCH v8 2/8] system/physmem: Support IOMMU granularity smaller than TARGET_PAGE size Ethan Chen via
2024-07-15 9:56 ` Ethan Chen via
2024-08-08 4:12 ` Alistair Francis
2024-07-15 9:56 ` [PATCH v8 3/8] target/riscv: Add support for IOPMP Ethan Chen via
2024-07-15 9:56 ` Ethan Chen via
2024-08-08 4:13 ` Alistair Francis
2024-07-15 9:56 ` [PATCH v8 4/8] hw/misc/riscv_iopmp: Add RISC-V IOPMP device Ethan Chen via
2024-07-15 9:56 ` Ethan Chen via
2024-08-08 3:56 ` Alistair Francis
2024-08-09 9:42 ` Ethan Chen via
2024-08-09 9:42 ` Ethan Chen via
2024-08-12 0:42 ` Alistair Francis
2024-08-09 10:03 ` Ethan Chen via
2024-08-09 10:03 ` Ethan Chen via
2024-07-15 10:12 ` [PATCH v8 5/8] hw/misc/riscv_iopmp: Add API to set up IOPMP protection for system memory Ethan Chen via
2024-07-15 10:12 ` Ethan Chen via
2024-08-08 4:23 ` Alistair Francis
2024-08-09 10:11 ` Ethan Chen via
2024-08-09 10:11 ` Ethan Chen via
2024-08-12 0:47 ` Alistair Francis
2024-08-12 2:44 ` Ethan Chen via
2024-08-12 2:44 ` Ethan Chen via
2024-07-15 10:14 ` [PATCH v8 6/8] hw/misc/riscv_iopmp: Add API to configure RISCV CPU IOPMP support Ethan Chen via
2024-07-15 10:14 ` Ethan Chen via
2024-08-08 4:25 ` Alistair Francis
2024-08-09 9:56 ` Ethan Chen via
2024-08-09 9:56 ` Ethan Chen via
2024-07-15 10:14 ` [PATCH v8 7/8] hw/misc/riscv_iopmp: Add DMA operation with IOPMP support API Ethan Chen via
2024-07-15 10:14 ` Ethan Chen via
2024-07-15 10:14 ` [PATCH v8 8/8] hw/riscv/virt: Add IOPMP support Ethan Chen via
2024-07-15 10:14 ` Ethan Chen via
2024-08-08 4:01 ` Alistair Francis
2024-08-09 10:14 ` Ethan Chen via
2024-08-09 10:14 ` Ethan Chen via
2024-08-12 0:48 ` Alistair Francis
2024-08-12 2:55 ` Ethan Chen via
2024-08-12 2:55 ` Ethan Chen via
2024-11-05 18:36 ` Daniel Henrique Barboza [this message]
2024-11-08 1:16 ` [PATCH v8 0/8] Support RISC-V IOPMP Ethan Chen via
2024-11-08 1:16 ` Ethan Chen via
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