From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 3/3] drm/i915: don't rewrite the GTT on resume v2 Date: Sun, 28 Oct 2012 10:47:27 +0000 Message-ID: References: <1351271318-3148-1-git-send-email-jbarnes@virtuousgeek.org> <1351271318-3148-3-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 4F19F9E7EF for ; Sun, 28 Oct 2012 03:48:05 -0700 (PDT) In-Reply-To: <1351271318-3148-3-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, 26 Oct 2012 10:08:38 -0700, Jesse Barnes wrote: > The BIOS shouldn't be touching this memory across suspend/resume, so > just leave it alone. This saves us ~50ms on resume on my T420. > > v2: change gtt restore default on pre-gen4 (Chris) > move needs_gtt_restore flag into dev_priv I'm confident that it will work on gen3 now as well, just gen2 remains doubtful. Hmm, I still have the pnv box that required the GTT rewrite after resume on my desk... Perhaps a more explicit test for a "sane" BIOS would be one that provides OpRegion. -Chris -- Chris Wilson, Intel Open Source Technology Centre