From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 1/2] drm/i915: Kill i915_gem_execbuffer_wait_for_flips() Date: Thu, 01 Nov 2012 08:58:16 +0000 Message-ID: References: <1351705121-17627-1-git-send-email-ville.syrjala@linux.intel.com> <1351705121-17627-2-git-send-email-ville.syrjala@linux.intel.com> <87d2zy89aw.fsf@eliezer.anholt.net> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0320377850==" Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id D5A999EEA1 for ; Thu, 1 Nov 2012 01:59:16 -0700 (PDT) In-Reply-To: <87d2zy89aw.fsf@eliezer.anholt.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Eric Anholt , ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0320377850== Content-Type: text/plain On Wed, 31 Oct 2012 17:18:47 -0700, Eric Anholt wrote: > ville.syrjala@linux.intel.com writes: > > > From: Ville Syrjälä > > > > As per Chris Wilson's suggestion make > > i915_gem_execbuffer_wait_for_flips() go away. > > > > This was used to stall the GPU ring while there are pending > > page flips involving the relevant BO. Ie. while the BO is still > > being scanned out by the display controller. > > > > The recommended alternative is to use the page flip events to > > wait for the page flips to fully complete before reusing the BO > > of the old front buffer. Or use more buffers. > > So, after this change, if userland submits an execbuf between having > requested a pageflip and the vblank that the flip shows up on, does that > exec block? The code itself is dysfunctional and would cause a GPU hang on snb/ivb. Why should the kernel be imposing a policy upon userspace where none is required? -Chris -- Chris Wilson, Intel Open Source Technology Centre --===============0320377850== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0320377850==--