Re: [PATCH v5 1/4] drm/amdgpu/userq: initialize gobj_read/write in amdgpu_userq_signal_ioctl

["Christian König" <christian.koenig@amd.com>]

On 2/24/26 13:50, Khatri, Sunil wrote:
> 
> On 24-02-2026 02:58 pm, Christian König wrote:
>> On 2/24/26 10:11, Sunil Khatri wrote:
>>> In case num_read_bo_handles or num_write_bo_handles is zero the ptrs
>>> remain uninitialized and during free cause a fault. So to handle such
>>> cases we better set the gobj_read and gobj_write to NULL.
>> Yeah that still doesn't looks like a good idea to me.
>>
>> We intentionally avoid nationalizations like that if they aren't necessary because that allows the compiler to complain about it.
>>
>> Christian.
> Sure Christian.
> @Alex, can you pull in the drm-misc-next to have the fixes in ASDN, or if it is supposed to take some time then in that case i think we need to push the change no 1 and 2 to ASDN as signal/wait IOCTL are broken right now.

We just need the ack from Alex to cherry pick the patch from Srini over to ASDN. Should be able to do this by tomorrow.

Regards,
Christian.

> 
> Regards
> Sunil Khatri
>>
>>> Fixes: 3cf117572294 ("drm/amdgpu/userq: Use drm_gem_objects_lookup in amdgpu_userq_signal_ioctl")
>>> Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c | 2 +-
>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
>>> index 18e77b61b201..e53e14e3bf2d 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
>>> @@ -465,7 +465,7 @@ int amdgpu_userq_signal_ioctl(struct drm_device *dev, void *data,
>>>       const unsigned int num_read_bo_handles = args->num_bo_read_handles;
>>>       struct amdgpu_fpriv *fpriv = filp->driver_priv;
>>>       struct amdgpu_userq_mgr *userq_mgr = &fpriv->userq_mgr;
>>> -    struct drm_gem_object **gobj_write, **gobj_read;
>>> +    struct drm_gem_object **gobj_write = NULL, **gobj_read = NULL;
>>>       u32 *syncobj_handles, num_syncobj_handles;
>>>       struct amdgpu_userq_fence *userq_fence;
>>>       struct amdgpu_usermode_queue *queue;