From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: Bin Meng <bmeng.cn@gmail.com>, Anup Patel <anup@brainfault.org>,
Alistair Francis <Alistair.Francis@wdc.com>
Cc: "Anup Patel" <apatel@ventanamicro.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
"Bin Meng" <bin.meng@windriver.com>,
"Cleber Rosa" <crosa@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
"Beraldo Leal" <bleal@redhat.com>
Subject: Re: [PATCH 01/15] tests/avocado: add RISC-V opensbi boot test
Date: Tue, 27 Dec 2022 15:02:38 -0300 [thread overview]
Message-ID: <ba1e50bd-9f1b-7d5c-e09a-980de870d70d@ventanamicro.com> (raw)
In-Reply-To: <CAEUhbmWRpX1iAuGO95ixQg3AS+Q0aw-+hAPbYsJaqcVtOmNj6Q@mail.gmail.com>
Bin,
On 12/26/22 10:56, Bin Meng wrote:
> On Sat, Dec 24, 2022 at 11:52 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>> Hi,
>>
>> On Fri, Dec 23, 2022 at 2:25 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>>> Hi Anup,
>>>
>>> On Fri, Dec 23, 2022 at 12:56 AM Anup Patel <anup@brainfault.org> wrote:
>>>> On Thu, Dec 22, 2022 at 6:27 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>>>>> On Thu, Dec 22, 2022 at 6:47 PM Daniel Henrique Barboza
>>>>> <dbarboza@ventanamicro.com> wrote:
>>>>>>
>>>>>>
>>>>>> On 12/22/22 07:24, Bin Meng wrote:
>>>>>>> On Thu, Dec 22, 2022 at 2:29 AM Daniel Henrique Barboza
>>>>>>> <dbarboza@ventanamicro.com> wrote:
>>>>>>>> This test is used to do a quick sanity check to ensure that we're able
>>>>>>>> to run the existing QEMU FW image.
[.....]
>>>>>>>> + wait_for_console_pattern(self, 'Boot HART MEDELEG')
>>>>>>> How about testing riscv32_spike too?
>>>>>>
>>>>>> I didn't manage to make it work. This riscv64 spark command line boots opensbi:
>>>>>>
>>>>>>
>>>>>> $ ./qemu-system-riscv64 -nographic -display none -vga none -machine spike
>>>>>>
>>>>>> OpenSBI v1.1
>>>>>> ____ _____ ____ _____
>>>>>> / __ \ / ____| _ \_ _|
>>>>>> | | | |_ __ ___ _ __ | (___ | |_) || |
>>>>>> | | | | '_ \ / _ \ '_ \ \___ \| _ < | |
>>>>>> | |__| | |_) | __/ | | |____) | |_) || |_
>>>>>> \____/| .__/ \___|_| |_|_____/|____/_____|
>>>>>> | |
>>>>>> |_|
>>>>>>
>>>>>> (...)
>>>>>>
>>>>>> The same command line doesn't boot riscv32 spark:
>>>>>>
>>>>>> ./qemu-system-riscv32 -nographic -display none -vga none -machine spike
>>>>>> (--- hangs indefinitely ---)
>>>>>>
>>>>>> I debugged it a bit and, as far as boot code goes, it goes all the way and loads the
>>>>>> opensbi 32bit binary.
>>>>>>
>>>>>> After that I tried to found any command line example that boots spike with riscv32
>>>>>> bit and didn't find any. So I gave up digging it further because I became unsure
>>>>>> about whether 32-bit spike works.
>>>>>>
>>>>>> If someone can verify that yes, 32-bit spike is supposed to work, then I believe it's
>>>>>> worth investigating why it's not the case ATM.
>>>>>>
>>>>> +Anup who might know if QEMU spike 32-bit machine works with opensbi
>>>>> 32-bit generic image.
>>>> We never got HTIF putc() working on QEMU RV32 Spike but it works
>>>> perfectly fine on QEMU RV64 Spike.
>>> Where is the problem for the 32-bit? Is it in OpenSBI or in QEMU?
>>>
>>>> See below log of QEMU RV64 Spike ...
>>>>
>>> If we cannot get Spike 32-bit to work in QEMU, should we drop the
>>> 32-bit support? @Alistair Francis
>> I got a deeper look at the 32-bit spike issue and I believe it is a
>> problem of QEMU HTIF emulation.
>>
>> I will see if I can spin a patch to fix this.
>>
> It turns out there is a bug in OpenSBI too when booting 32-bit BIN
> image on Spike.
>
> For ELF & BIN image boot on QEMU, QEMU changes are needed. I will send
> the QEMU patches soon.
I reviewed the QEMU patches and sent a tested-by ack in the opensbi fix
as well. LGTM.
As I commented in your QEMU patches earlier [1], it would be good if we could
have an opensbi 1.2 rom with the fix already applied. If that's not possible then
what we could do, w.r.t this patch, is to add the spike 32bit test with a skip note
mentioning that we need an opensbi update before enabling it.
[1] https://mail.gnu.org/archive/html/qemu-devel/2022-12/msg04414.html
Thanks,
Daniel
>
> Regards,
> Bin
next prev parent reply other threads:[~2022-12-27 18:02 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-21 18:22 [PATCH 00/15] riscv: opensbi boot test and cleanups Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 01/15] tests/avocado: add RISC-V opensbi boot test Daniel Henrique Barboza
2022-12-22 10:24 ` Bin Meng
2022-12-22 10:47 ` Daniel Henrique Barboza
2022-12-22 12:56 ` Bin Meng
2022-12-22 16:56 ` Anup Patel
2022-12-22 20:58 ` Daniel Henrique Barboza
2022-12-23 6:25 ` Bin Meng
2022-12-24 3:52 ` Bin Meng
2022-12-26 13:56 ` Bin Meng
2022-12-26 14:00 ` Daniel Henrique Barboza
2022-12-27 18:02 ` Daniel Henrique Barboza [this message]
2022-12-23 2:40 ` Alistair Francis
2022-12-27 23:04 ` Wainer dos Santos Moschetta
2022-12-21 18:22 ` [PATCH 02/15] hw/riscv/spike: use 'fdt' from MachineState Daniel Henrique Barboza
2022-12-22 14:25 ` Philippe Mathieu-Daudé
2022-12-22 16:43 ` Daniel Henrique Barboza
2022-12-23 3:10 ` Alistair Francis
2022-12-23 9:09 ` Bin Meng
2022-12-21 18:22 ` [PATCH 03/15] hw/riscv/sifive_u: " Daniel Henrique Barboza
2022-12-22 14:25 ` Philippe Mathieu-Daudé
2022-12-23 3:12 ` Alistair Francis
2022-12-23 9:10 ` Bin Meng
2022-12-21 18:22 ` [PATCH 04/15] hw/riscv/boot.c: make riscv_find_firmware() static Daniel Henrique Barboza
2022-12-22 14:26 ` Philippe Mathieu-Daudé
2022-12-23 3:13 ` Alistair Francis
2022-12-23 9:13 ` Bin Meng
2022-12-21 18:22 ` [PATCH 05/15] hw/riscv/boot.c: introduce riscv_default_firmware_name() Daniel Henrique Barboza
2022-12-23 3:17 ` Alistair Francis
2022-12-23 9:20 ` Bin Meng
2022-12-21 18:22 ` [PATCH 06/15] hw/riscv/spike.c: load initrd right after riscv_load_kernel() Daniel Henrique Barboza
2022-12-22 14:27 ` Philippe Mathieu-Daudé
2022-12-23 3:19 ` Alistair Francis
2022-12-23 10:04 ` Bin Meng
2022-12-26 13:49 ` Bin Meng
2022-12-26 13:52 ` Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 07/15] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() Daniel Henrique Barboza
2022-12-23 10:15 ` Bin Meng
2022-12-21 18:22 ` [PATCH 08/15] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel() Daniel Henrique Barboza
2022-12-23 10:32 ` Bin Meng
2022-12-21 18:22 ` [PATCH 09/15] hw/riscv/boot.c: use MachineState in riscv_load_initrd() Daniel Henrique Barboza
2022-12-22 14:27 ` Philippe Mathieu-Daudé
2022-12-23 10:47 ` Bin Meng
2022-12-21 18:22 ` [PATCH 10/15] hw/riscv/boot.c: use MachineState in riscv_load_kernel() Daniel Henrique Barboza
2022-12-22 14:28 ` Philippe Mathieu-Daudé
2022-12-23 10:55 ` Bin Meng
2022-12-21 18:22 ` [PATCH 11/15] hw/riscv/boot.c: consolidate all kernel init " Daniel Henrique Barboza
2022-12-23 12:55 ` Bin Meng
2022-12-21 18:22 ` [PATCH 12/15] hw/riscv/boot.c: make riscv_load_initrd() static Daniel Henrique Barboza
2022-12-22 14:29 ` Philippe Mathieu-Daudé
2022-12-23 12:56 ` Bin Meng
2022-12-21 18:22 ` [PATCH 13/15] hw/riscv/spike.c: simplify create_fdt() Daniel Henrique Barboza
2022-12-23 13:06 ` Bin Meng
2022-12-26 14:18 ` Daniel Henrique Barboza
2022-12-21 18:22 ` [PATCH 14/15] hw/riscv/virt.c: " Daniel Henrique Barboza
2022-12-21 18:23 ` [PATCH 15/15] hw/riscv/sifive_u: " Daniel Henrique Barboza
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