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From: Eric Auger <eric.auger@redhat.com>
To: Khushit Shah <khushit.shah@nutanix.com>
Cc: "eric.auger.pro@gmail.com" <eric.auger.pro@gmail.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
	"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
	"peter.maydell@linaro.org" <peter.maydell@linaro.org>,
	Shaju Abraham <shaju.abraham@nutanix.com>,
	"yangjinqian1@huawei.com" <yangjinqian1@huawei.com>,
	"cohuck@redhat.com" <cohuck@redhat.com>,
	"richard.henderson@linaro.org" <richard.henderson@linaro.org>,
	"sebott@redhat.com" <sebott@redhat.com>,
	"skolothumtho@nvidia.com" <skolothumtho@nvidia.com>,
	"philmd@oss.qualcomm.com" <philmd@oss.qualcomm.com>,
	"maz@kernel.org" <maz@kernel.org>,
	"oliver.upton@linux.dev" <oliver.upton@linux.dev>,
	"pbonzini@redhat.com" <pbonzini@redhat.com>,
	"armbru@redhat.com" <armbru@redhat.com>,
	"berrange@redhat.com" <berrange@redhat.com>,
	"abologna@redhat.com" <abologna@redhat.com>,
	"jdenemar@redhat.com" <jdenemar@redhat.com>
Subject: Re: [RFC PATCH v7 00/18] kvm/arm: Introduce a customizable aarch64 KVM host model
Date: Tue, 25 Aug 2026 08:35:45 +0200	[thread overview]
Message-ID: <bb73e5bd-d64b-490e-9f2a-958b3105e962@redhat.com> (raw)
In-Reply-To: <2C1E0EFD-7BD3-4177-90F8-14894B34F726@nutanix.com>



On 8/24/26 10:19 AM, Khushit Shah wrote:
>
>> On 20 Aug 2026, at 11:57 AM, Khushit Shah <khushit.shah@nutanix.com> wrote:
>>
>>
>>
>>> On 26 Jul 2026, at 8:59 PM, Eric Auger <eric.auger@redhat.com> wrote:
>>>
>>> !-------------------------------------------------------------------|
>>> CAUTION: External Email
>>>
>>> |-------------------------------------------------------------------!
>>>
>>> This series enhances the current host KVM model with capability to
>>> set writable ID reg fields. 
>>>
>>> Since v6.7 kernel, KVM/arm allows the userspace to overwrite the values
>>> of a subset of ID regs. The list of writable fields continues to grow.
>>> The feature ID range is defined as the AArch64 System register space
>>> with op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7}, op2=={0-7}.
>>>
>>> The end goal is to get more flexibility when migrating guests
>>> between different host hardware.
>>>
>>> QEMU retrieves the writable ID fields from KVM UAPI [1] and
>>> match them against a generated description of ID regs and their
>>> named fields that stem from AARCHMRS Registers.json file.
>>> Current description is based on latest 2026-03 edition.
>>> The content of the generated files was compared against kernel
>>> linux/arch/arm64/tools/sysreg file. It is not straightforward
>>> to have unit tests for python scripts as there are many cases for
>>> field extraction. 
>>>
>>> For each writable named field a uint64 property is created
>>> following the "SYSREG_<REG>_<FIELD>" naming convention. REG and
>>> FIELD names are those described in ARM ARM Reference manual.
>>>
>>> The list of SYSREG_ID properties can be retrieved through the qmp
>>> monitor using query-cpu-model-expansion [2].
>>>
>>> For the record, Jinqian was able to migrate between Hisilicon KunPeng
>>> HIP09 and HIP12 chips with this series using this kind of command:
>>>
>>> -cpu host,pauth=off,pmu=off,sve=off,\
>>> SYSREG_ID_AA64PFR1_EL1_NMI=0x0,\
>>> SYSREG_ID_AA64ISAR1_EL1_LS64=0x0,\
>>> SYSREG_ID_AA64ISAR1_EL1_XS=0x0,\
>>> SYSREG_ID_AA64ISAR1_EL1_LRCPC=0x2,\
>>> SYSREG_ID_AA64ISAR2_EL1_RPRFM=0x0,\
>>> SYSREG_ID_AA64ISAR2_EL1_CLRBHB=0x0,\
>>> SYSREG_ID_AA64ISAR2_EL1_PAC_frac=0x0,\
>>> SYSREG_ID_AA64ISAR2_EL1_BC=0x0,\
>>> SYSREG_ID_AA64ISAR2_EL1_RPRES=0x0,\
>>> SYSREG_ID_AA64ISAR2_EL1_WFxT=0x0,\
>>> SYSREG_ID_AA64MMFR0_EL1_FGT=0x0,\
>>> SYSREG_ID_AA64MMFR0_EL1_BigEnd=0x0,\
>>> SYSREG_ID_AA64MMFR1_EL1_ECBHB=0x0,\
>>> SYSREG_ID_AA64MMFR1_EL1_CMOW=0x0,\
>>> SYSREG_ID_AA64MMFR1_EL1_TIDCP1=0x0,\
>>> SYSREG_ID_AA64MMFR1_EL1_nTLBPA=0x0,\
>>> SYSREG_ID_AA64MMFR1_EL1_AFP=0x0,\
>>> SYSREG_ID_AA64MMFR1_EL1_HCX=0x0,\
>>> SYSREG_ID_AA64MMFR1_EL1_ETS=0x0,\
>>> SYSREG_ID_AA64MMFR1_EL1_PAN=0x2,\
>>> SYSREG_ID_AA64MMFR1_EL1_HAFDBS=0x2,\
>>> SYSREG_ID_AA64MMFR2_EL1_CnP=0x0,\
>>> SYSREG_ID_AA64MMFR3_EL1_TCRX=0x0,\
>>> SYSREG_ID_AA64DFR0_EL1_PMUVer=0x6,\
>>> SYSREG_ID_AA64DFR0_EL1_DebugVer=0x9,\
>>> SYSREG_ID_AA64DFR0_EL1_DoubleLock=0xf,\
>>> SYSREG_ID_AA64ZFR0_EL1_F64MM=0x0,\
>>> SYSREG_ID_AA64ZFR0_EL1_F32MM=0x0,\
>>> SYSREG_ID_AA64ZFR0_EL1_SM4=0x0,\
>>> SYSREG_ID_AA64ZFR0_EL1_SHA3=0x0,\
>>> SYSREG_ID_AA64ZFR0_EL1_BitPerm=0x0,\
>>> SYSREG_ID_AA64ZFR0_EL1_AES=0x0,\
>>> SYSREG_ID_AA64ZFR0_EL1_SVEver=0x0,\
>>> SYSREG_CTR_EL0_L1Ip=0x2 \
>>>
>>> Connie & Eric
>>>
>>> This series can be found at:
>>> https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_eauger_qemu_tree_arm-2Dcpu-2Dmodel-2Dv7&d=DwIDAg&c=s883GpUCOChKOHiocYtGcg&r=PGWMyignA0NiDmTlyP7vOTHozBws_VN86yrVmSMkBp0&m=xh5u7-r6auXiWQScafdj-0wW70mXB4FhClh58GryHmExkx8uZN-h9j4B2c90Lowd&s=Ro4v_mjoNaLsznyxm781lzXBcRtXTudjibmgIhoJsNM&e= 
>>>
>>> History:
>>> --------
>>> v6 -> v7:
>>> - query-cpu-model-expansion now applies the sysreg props
>>> onto a scratch vcpu (POC) allowing a finer validation of settings
>>> (not perfect though as init may be revisited depending on
>>> settings)
>>> - Properly handle ValueRange (Khushit)
>>> - Remove cpu parameter in get_host_cpu_idregs call chain
>>> (Khushit)
>>>
>>> v5 -> v6:
>>> v6 is mostly for Khushit to see how he may work on top
>>> of this series. It fulfills some of his requirements:
>>> - Upon Khushit request I added description for enum values
>>> and reserved fields
>>> - set_sysreg_prop checks the input value against enum values
>>> if any
>>> - writable_bitmap is now dispatched into the sysreg descripton
>>> and not stored in vcpu state anymore (besides it is VM wide)
>>> - implemented write for qmp inspection. However this is not
>>> yet checked against KVM. That's the next step I think, ie.
>>> instantiate a scratch vcpu to test if the field value can be
>>> applied?
>>> - if some inconsistencies between writable mask and idreg
>>> field, reserved fields only produce traces
>>> - this version does not yet fix some reported issues about host
>>> supporting nested virt. I will further sync with Khushit.
>>> so this is definitively not candidate to be applied, hence the
>>> RFC tag.
>>>
>>> Cornelia Huck (3):
>>> target/arm/kvm: Retrieve writable ID reg map
>>> arm/cpu-features: document ID reg properties
>>> arm-qmp-cmds: introspection for ID register props
>>>
>>> Eric Auger (14):
>>> scripts: introduce scripts/update-aarch64-cpu-sysregs-header.py
>>> target/arm/cpu-sysregs.h.inc: Sort by name alphabetical order
>>> target/arm/cpu-sysregs.h.inc: Update with automatic generation
>>> arm/cpu: Add infra to handle generated ID register definitions
>>> scripts: Introduce scripts/aarch64_sysreg_helpers module
>>> scripts: Introduce scripts/update-aarch64-cpu-sysreg-properties.py
>>> target/arm/cpu-idregs.h.inc: generate with script
>>> target/arm/cpu-idregs.h.inc: Generate enum values
>>> arm/kvm: Initialize all writable ID registers from host
>>> target/arm/kvm: Introduce kvm_arm_expose_idreg_properties
>>> target/arm/cpu: Expose writable ID reg field properties on the kvm
>>>   host vcpu model
>>> target/arm/cpu-idregs.h.inc: Generate reserved fields
>>> target/arm/kvm: Ignore and trace unexpected writable reserved fields
>>> target/arm/kvm: add utility to write idregs in scratch vcpu
>>>
>>> Shaju Abraham (1):
>>> target/arm/cpu_idregs: generate tables for Arm64 ID registers and
>>>   fields
>>>
>>> docs/system/arm/cpu-features.rst              |  106 +-
>>> target/arm/cpu-idregs.h                       |   41 +
>>> target/arm/kvm_arm.h                          |   13 +
>>> target/arm/cpu-idregs.h.inc                   | 2164 +++++++++++++++++
>>> target/arm/cpu-sysregs.h.inc                  |   57 +-
>>> target/arm/arm-qmp-cmds.c                     |   98 +
>>> target/arm/cpu-idregs.c                       |   96 +
>>> target/arm/cpu64.c                            |    5 +
>>> target/arm/kvm-stub.c                         |    6 +
>>> target/arm/kvm.c                              |  360 ++-
>>> scripts/aarch64_sysreg_helpers.py             |  109 +
>>> .../update-aarch64-cpu-sysreg-properties.py   |  290 +++
>>> scripts/update-aarch64-cpu-sysregs-header.py  |   51 +
>>> target/arm/meson.build                        |    1 +
>>> target/arm/trace-events                       |    8 +
>>> 15 files changed, 3373 insertions(+), 32 deletions(-)
>>> create mode 100644 target/arm/cpu-idregs.h
>>> create mode 100644 target/arm/cpu-idregs.h.inc
>>> create mode 100644 target/arm/cpu-idregs.c
>>> create mode 100644 scripts/aarch64_sysreg_helpers.py
>>> create mode 100644 scripts/update-aarch64-cpu-sysreg-properties.py
>>> create mode 100755 scripts/update-aarch64-cpu-sysregs-header.py
>>>
>>> -- 
>>> 2.53.0
>>>
>> Hi,
>>
>> On my box the build is failing with:
>> [97/2192] Linking target qemu-system-arm
>> FAILED: qemu-system-arm
>> cc @qemu-system-arm.rsp
>> /usr/bin/ld: libsystem_arm.a.p/target_arm_arm-qmp-cmds.c.o: in function `qmp_query_cpu_model_expansion':
>> /home/ahv/qemu/build/../target/arm/arm-qmp-cmds.c:144:(.text+0x4d4): undefined reference to `kvm_check_extension'
>> /usr/bin/ld: /home/ahv/qemu/build/../target/arm/arm-qmp-cmds.c:145:(.text+0x4e4): undefined reference to `kvm_check_extension'
>> /usr/bin/ld: /home/ahv/qemu/build/../target/arm/arm-qmp-cmds.c:151:(.text+0x514): undefined reference to `kvm_check_extension'
>> /usr/bin/ld: /home/ahv/qemu/build/../target/arm/arm-qmp-cmds.c:168:(.text+0x554): undefined reference to `kvm_arm_create_scratch_host_vcpu'
>> /usr/bin/ld: /home/ahv/qemu/build/../target/arm/arm-qmp-cmds.c:152:(.text+0x7d4): undefined reference to `kvm_check_extension'
>> /usr/bin/ld: /home/ahv/qemu/build/../target/arm/arm-qmp-cmds.c:247:(.text+0x8f4): undefined reference to `kvm_arm_destroy_scratch_host_vcpu'
>> collect2: error: ld returned 1 exit status
>
> If I add appropriate stubs, Following test fails:
>   30/1079 qemu:qtest+qtest-aarch64 / qtest-aarch64/device-introspect-test         ERROR            1.58s   killed by signal 6 SIGABRT
>  126/1079 qemu:qtest+qtest-aarch64 / qtest-aarch64/qom-test                       ERROR           46.65s   killed by signal 6 SIGABRT
>  426/1079 qemu:qtest+qtest-aarch64 / qtest-aarch64/arm-cpu-features               ERROR            0.51s   killed by signal 6 SIGABRT
>  467/1079 qemu:qtest+qtest-arm / qtest-arm/arm-cpu-features                       ERROR            0.46s   killed by signal 6 SIGABRT
all the above are fixed now.
>  966/1079 qemu:block / io-qcow2-161                                               ERROR            1.95s   exit status 1
this one looks unrelated to this series. I did not encounter it.

Thanks

Eric
>



  parent reply	other threads:[~2026-08-25  6:36 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-26 15:29 [RFC PATCH v7 00/18] kvm/arm: Introduce a customizable aarch64 KVM host model Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 01/18] scripts: introduce scripts/update-aarch64-cpu-sysregs-header.py Eric Auger
2026-08-20  6:31   ` Khushit Shah
2026-07-26 15:29 ` [RFC PATCH v7 02/18] target/arm/cpu-sysregs.h.inc: Sort by name alphabetical order Eric Auger
2026-08-20  6:32   ` Khushit Shah
2026-07-26 15:29 ` [RFC PATCH v7 03/18] target/arm/cpu-sysregs.h.inc: Update with automatic generation Eric Auger
2026-08-20  6:55   ` Khushit Shah
2026-08-26  6:45     ` Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 04/18] arm/cpu: Add infra to handle generated ID register definitions Eric Auger
2026-08-20  6:35   ` Khushit Shah
2026-08-25 14:08     ` Eric Auger
2026-08-20  6:39   ` Khushit Shah
2026-07-26 15:29 ` [RFC PATCH v7 05/18] scripts: Introduce scripts/aarch64_sysreg_helpers module Eric Auger
2026-08-20  7:09   ` Khushit Shah
2026-07-26 15:29 ` [RFC PATCH v7 06/18] scripts: Introduce scripts/update-aarch64-cpu-sysreg-properties.py Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 07/18] target/arm/cpu-idregs.h.inc: generate with script Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 08/18] target/arm/cpu-idregs.h.inc: Generate enum values Eric Auger
2026-08-20  9:02   ` Khushit Shah
2026-08-25 15:02     ` Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 09/18] target/arm/cpu_idregs: generate tables for Arm64 ID registers and fields Eric Auger
2026-08-20  9:06   ` Khushit Shah
2026-07-26 15:29 ` [RFC PATCH v7 10/18] target/arm/kvm: Retrieve writable ID reg map Eric Auger
2026-08-06  4:52   ` Khushit Shah
2026-08-11  8:10     ` Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 11/18] arm/kvm: Initialize all writable ID registers from host Eric Auger
2026-08-20  9:49   ` Khushit Shah
2026-07-26 15:29 ` [RFC PATCH v7 12/18] target/arm/kvm: Introduce kvm_arm_expose_idreg_properties Eric Auger
2026-08-20 11:49   ` Markus Armbruster
2026-08-24 17:21     ` Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 13/18] target/arm/cpu: Expose writable ID reg field properties on the kvm host vcpu model Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 14/18] target/arm/cpu-idregs.h.inc: Generate reserved fields Eric Auger
2026-08-24  6:55   ` Khushit Shah
2026-08-25 15:34     ` Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 15/18] target/arm/kvm: Ignore and trace unexpected writable " Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 16/18] arm/cpu-features: document ID reg properties Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 17/18] target/arm/kvm: add utility to write idregs in scratch vcpu Eric Auger
2026-07-26 15:29 ` [RFC PATCH v7 18/18] arm-qmp-cmds: introspection for ID register props Eric Auger
2026-08-20 11:50   ` Markus Armbruster
2026-08-25  8:38     ` Eric Auger
2026-08-25  9:20       ` Markus Armbruster
2026-08-25 14:12         ` Eric Auger
2026-08-24 11:59   ` Khushit Shah
2026-08-26  6:50     ` Eric Auger
2026-08-26 11:27       ` Khushit Shah
2026-08-26 12:08         ` Eric Auger
2026-08-26 16:47           ` Eric Auger
2026-08-27  5:30             ` Khushit Shah
2026-08-27  7:18               ` Eric Auger
2026-08-20  6:27 ` [RFC PATCH v7 00/18] kvm/arm: Introduce a customizable aarch64 KVM host model Khushit Shah
2026-08-24  8:19   ` Khushit Shah
2026-08-24  8:47     ` Eric Auger
2026-08-24 13:26       ` Khushit Shah
2026-08-25  6:35     ` Eric Auger [this message]
2026-08-25  6:49       ` Khushit Shah
2026-08-25  8:42         ` Eric Auger

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