From: Yi Liu <yi.l.liu@intel.com>
To: "Duan, Zhenzhong" <zhenzhong.duan@intel.com>,
Jason Wang <jasowang@redhat.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"alex.williamson@redhat.com" <alex.williamson@redhat.com>,
"clg@redhat.com" <clg@redhat.com>,
"eric.auger@redhat.com" <eric.auger@redhat.com>,
"mst@redhat.com" <mst@redhat.com>,
"peterx@redhat.com" <peterx@redhat.com>,
"jgg@nvidia.com" <jgg@nvidia.com>,
"nicolinc@nvidia.com" <nicolinc@nvidia.com>,
"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
"clement.mathieu--drif@eviden.com"
<clement.mathieu--drif@eviden.com>,
"Tian, Kevin" <kevin.tian@intel.com>,
"Peng, Chao P" <chao.p.peng@intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Eduardo Habkost <eduardo@habkost.net>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Subject: Re: [PATCH v3 15/17] intel_iommu: Modify x-scalable-mode to be string option to expose scalable modern mode
Date: Mon, 4 Nov 2024 11:24:37 +0800 [thread overview]
Message-ID: <bbcf1216-19b9-4d05-ba57-e451f3566f4f@intel.com> (raw)
In-Reply-To: <SJ0PR11MB6744F7B57D686541929B02C492752@SJ0PR11MB6744.namprd11.prod.outlook.com>
On 2024/9/29 10:44, Duan, Zhenzhong wrote
>>
>> A question here:
>>
>> Are there any other major features that are still lacking for scalable
>> mode? If not, maybe we can get rid of the "x" prefix?
>
> We don't support stage-1 and stage-2 coexist emulation and nested translation emulation through stage-1 and stage-2 yet.
>
> Currently we only support either stage-1 or stage-2 in scalable mode, one reason is supporting stage1 is enough for current usage,
> the other reason is to simplify the nesting series https://github.com/yiliu1765/qemu/tree/zhenzhong/iommufd_nesting_rfcv2 for review.
PRI is also a missing part. :)
--
Regards,
Yi Liu
next prev parent reply other threads:[~2024-11-04 3:20 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-11 5:22 [PATCH v3 00/17] intel_iommu: Enable stage-1 translation for emulated device Zhenzhong Duan
2024-09-11 5:22 ` [PATCH v3 01/17] intel_iommu: Use the latest fault reasons defined by spec Zhenzhong Duan
2024-09-27 0:12 ` Jason Wang
2024-09-11 5:22 ` [PATCH v3 02/17] intel_iommu: Make pasid entry type check accurate Zhenzhong Duan
2024-09-27 0:13 ` Jason Wang
2024-09-11 5:22 ` [PATCH v3 03/17] intel_iommu: Add a placeholder variable for scalable modern mode Zhenzhong Duan
2024-09-11 6:26 ` CLEMENT MATHIEU--DRIF
2024-09-11 8:38 ` Duan, Zhenzhong
2024-09-27 0:15 ` Jason Wang
2024-09-11 5:22 ` [PATCH v3 04/17] intel_iommu: Flush stage-2 cache in PASID-selective PASID-based iotlb invalidation Zhenzhong Duan
2024-09-11 6:54 ` CLEMENT MATHIEU--DRIF
2024-09-27 3:47 ` Jason Wang
2024-09-27 6:38 ` Duan, Zhenzhong
2024-09-11 5:22 ` [PATCH v3 05/17] intel_iommu: Rename slpte to pte Zhenzhong Duan
2024-09-27 3:47 ` Jason Wang
2024-09-29 12:43 ` Yi Liu
2024-09-30 3:43 ` Duan, Zhenzhong
2024-09-11 5:22 ` [PATCH v3 06/17] intel_iommu: Implement stage-1 translation Zhenzhong Duan
2024-09-27 4:07 ` Jason Wang
2024-09-29 13:58 ` Yi Liu
2024-09-30 5:55 ` Duan, Zhenzhong
2024-09-11 5:22 ` [PATCH v3 07/17] intel_iommu: Check if the input address is canonical Zhenzhong Duan
2024-09-27 4:07 ` Jason Wang
2024-09-11 5:22 ` [PATCH v3 08/17] intel_iommu: Set accessed and dirty bits during first stage translation Zhenzhong Duan
2024-09-27 4:07 ` Jason Wang
2024-09-27 6:38 ` Duan, Zhenzhong
2024-09-11 5:22 ` [PATCH v3 09/17] intel_iommu: Flush stage-1 cache in iotlb invalidation Zhenzhong Duan
2024-09-27 4:07 ` Jason Wang
2024-09-11 5:22 ` [PATCH v3 10/17] intel_iommu: Process PASID-based " Zhenzhong Duan
2024-09-27 4:08 ` Jason Wang
2024-09-11 5:22 ` [PATCH v3 11/17] intel_iommu: Add an internal API to find an address space with PASID Zhenzhong Duan
2024-09-27 4:08 ` Jason Wang
2024-09-11 5:22 ` [PATCH v3 12/17] intel_iommu: Add support for PASID-based device IOTLB invalidation Zhenzhong Duan
2024-09-27 4:08 ` Jason Wang
2024-09-27 7:17 ` Duan, Zhenzhong
2024-09-27 8:02 ` Duan, Zhenzhong
2024-09-29 1:59 ` Jason Wang
2024-09-29 2:22 ` Duan, Zhenzhong
2024-12-16 8:21 ` Duan, Zhenzhong
2024-12-17 2:13 ` Jason Wang
2024-12-17 6:06 ` CLEMENT MATHIEU--DRIF
2024-09-11 5:22 ` [PATCH v3 13/17] intel_iommu: piotlb invalidation should notify unmap Zhenzhong Duan
2024-09-11 5:22 ` [PATCH v3 14/17] intel_iommu: Set default aw_bits to 48 in scalable modern mode Zhenzhong Duan
2024-09-27 4:08 ` Jason Wang
2024-09-27 6:38 ` Duan, Zhenzhong
2024-09-29 2:02 ` Jason Wang
2024-09-29 2:57 ` Duan, Zhenzhong
2024-09-11 5:22 ` [PATCH v3 15/17] intel_iommu: Modify x-scalable-mode to be string option to expose " Zhenzhong Duan
2024-09-11 6:54 ` CLEMENT MATHIEU--DRIF
2024-09-27 4:08 ` Jason Wang
2024-09-27 6:39 ` Duan, Zhenzhong
2024-09-29 2:00 ` Jason Wang
2024-09-29 2:44 ` Duan, Zhenzhong
2024-11-04 3:24 ` Yi Liu [this message]
2024-11-04 7:13 ` CLEMENT MATHIEU--DRIF
2024-09-11 5:22 ` [PATCH v3 16/17] intel_iommu: Introduce a property to control FS1GP cap bit setting Zhenzhong Duan
2024-09-27 4:08 ` Jason Wang
2024-09-27 6:39 ` Duan, Zhenzhong
2024-09-11 5:22 ` [PATCH v3 17/17] tests/qtest: Add intel-iommu test Zhenzhong Duan
2024-09-27 4:08 ` Jason Wang
2024-09-11 6:56 ` [PATCH v3 00/17] intel_iommu: Enable stage-1 translation for emulated device CLEMENT MATHIEU--DRIF
2024-09-11 8:43 ` Duan, Zhenzhong
2024-09-11 10:43 ` Michael S. Tsirkin
2024-09-26 9:25 ` Duan, Zhenzhong
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=bbcf1216-19b9-4d05-ba57-e451f3566f4f@intel.com \
--to=yi.l.liu@intel.com \
--cc=alex.williamson@redhat.com \
--cc=chao.p.peng@intel.com \
--cc=clement.mathieu--drif@eviden.com \
--cc=clg@redhat.com \
--cc=eduardo@habkost.net \
--cc=eric.auger@redhat.com \
--cc=jasowang@redhat.com \
--cc=jgg@nvidia.com \
--cc=joao.m.martins@oracle.com \
--cc=kevin.tian@intel.com \
--cc=marcel.apfelbaum@gmail.com \
--cc=mst@redhat.com \
--cc=nicolinc@nvidia.com \
--cc=pbonzini@redhat.com \
--cc=peterx@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=zhenzhong.duan@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.