From: Kris Chaplin <kris.chaplin@amd.com>
To: Rob Herring <robh@kernel.org>
Cc: thomas.delev@amd.com, michal.simek@amd.com,
krzysztof.kozlowski@linaro.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
git@amd.com
Subject: Re: [RESEND v2 1/2] dt-bindings: w1: Add YAML DT schema for AMD AXI w1 host and MAINTAINERS entry
Date: Mon, 30 Oct 2023 16:32:12 +0000 [thread overview]
Message-ID: <bbffd884-b31a-4e95-8a72-3705745b49f9@amd.com> (raw)
In-Reply-To: <CAL_Jsq+SMY+C3=e=zbdrP_Ekj3FkRs7QQyg2pqmjrcz_0AvmBQ@mail.gmail.com>
Thanks Rob,
On 30/10/2023 16:19, Rob Herring wrote:
>> Is there a device side implementation? I can't really imagine that
>> 1-wire would ever be implemented as firmware on the device side given
>> its limited nature. So adding 'host' doesn't make this any more
>> specific.
>>
>> There are slave drivers as well as master, although these do not have a device tree binding.
>
> My question is whether there is slave/device IP for implementing the
> device side in software? The slave drivers in the kernel are for
> handling those devices, not a slave side controller interface.
>
> For comparison, we have SPI slave in the kernel which is for
> implementing the device side in software (running Linux or another
> OS). There is no such thing in the kernel for 1-wire and I would doubt
> there would ever be a software implementation. Could you, yes, but
> given the limited nature of 1-wire why would you?
I agree - I'm not aware of any such interface or plans. Yes - I've seen
it with SPI, but I've not heard anything similar for 1-wire.
>
>>
>> The IP device from AMD is called "axi_1wire_host", and so we are hoping to stick with this binding if appropriate as it relates to the IP name.
>
> Okay, I suppose that is good enough reason.
Thank you - it does help when we can align the binding and IP name.
> However, the versioning comments in your first v2 have not been
> addressed. I believe the conclusion was to mention the IP has a
> version register. And Conor's R-by tag was not added.
I messed up with not adding a note about this to the commit on v2 which
I can resolve in a v3 - yes the versioning is via register in the IP
core at a known offset. The binding name (and IP name) changed between
v1 and v2 (from master to host) so I didn't add the review tag for Conor
in v2 as the commit changed.
regards,
Kris
next prev parent reply other threads:[~2023-10-30 16:32 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-26 9:28 [RESEND v2 0/2] w1: Add AXI 1-wire host driver for AMD programmable logic IP core Kris Chaplin
2023-10-26 9:28 ` [RESEND v2 1/2] dt-bindings: w1: Add YAML DT schema for AMD AXI w1 host and MAINTAINERS entry Kris Chaplin
2023-10-30 15:40 ` Rob Herring
2023-10-30 15:52 ` Kris Chaplin
2023-10-30 16:02 ` Krzysztof Kozlowski
[not found] ` <df37f8db-a8c7-4a99-8828-3cb123afed1d@amd.com>
2023-10-30 16:19 ` Rob Herring
2023-10-30 16:32 ` Kris Chaplin [this message]
2023-10-26 9:28 ` [RESEND v2 2/2] w1: Add AXI 1-wire host driver for AMD programmable logic IP core Kris Chaplin
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