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For example, what if more than 2Gb of MMIO space are needed >>>>> for non-64-bit BARs? >>>> It looks where usually RAM on RISC-V boards start, so I expect that 2gb >>>> before RAM start is enough for MMIO space. >>> Likely in the common case. Board designers aren't constrained by this, >>> though (aiui). Whereas you set in stone a single, fixed layout. >>> >>> Arm maintainers - since a similar fixed layout is used there iirc, >>> could you chime in here, please? >>> >>>> Answering your question it will be an issue or it will also use some >>>> space before banks, no? >>> I fear I don't understand what you're trying to tell me. >> I meant that there is also some space between banks and pretty big which >> could be used for MMIO which could be used for non-64-bit BARs. > I don't follow: Bank 0 extends to 4G. There's no space above it, below > bank 1, which could be use for non-64-bit BARs. So we have two banks: bank[0] -> [0x80000000, 0x100000000) bank[1] -> [0x0200000000, 10000000000) So i think we have some space between them [0x100000000, 0x0200000000) -> 4gb to be used for non-64-bit BARs. And also we have another 2gb before bank[0]. ~ Oleksii