Re: [PATCH] platform/x86/intel/tpmi: Use 32 bit aligned address for debugfs mem write

[srinivas pandruvada <srinivas.pandruvada@linux.intel.com>]

On Thu, 2026-03-26 at 12:28 +0200, Ilpo Järvinen wrote:
> On Wed, 25 Mar 2026, Srinivas Pandruvada wrote:
> 
> > The memory write feature supports 32-bit writes to any TPMI offset.
> > However, future hardware generations may not allow writes to non-
> > 32-bit
> > aligned addresses due to hardware optimizations.
> > 
> > Since all TPMI addresses are 64-bit aligned and correspond to 64-
> > bit
> > registers, enforce 32-bit alignment for write operations.
> > 
> > Signed-off-by: Srinivas Pandruvada
> > <srinivas.pandruvada@linux.intel.com>
> > ---
> >  drivers/platform/x86/intel/vsec_tpmi.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/platform/x86/intel/vsec_tpmi.c
> > b/drivers/platform/x86/intel/vsec_tpmi.c
> > index 98846e88d3d0..b70232d8ba58 100644
> > --- a/drivers/platform/x86/intel/vsec_tpmi.c
> > +++ b/drivers/platform/x86/intel/vsec_tpmi.c
> > @@ -479,6 +479,9 @@ static ssize_t mem_write(struct file *file,
> > const char __user *userbuf, size_t l
> >  	addr = array[2];
> >  	value = array[3];
> >  
> > +	if (addr % sizeof(u32))
> 
> Please use !IS_ALIGNED() instead (remember to check if you also need
> to 
> add an include).

Good point.

Thanks,
Srinivas

> 
> > +		return -EINVAL;
> > +
> >  	if (punit >= pfs->pfs_header.num_entries) {
> >  		ret = -EINVAL;
> >  		goto exit_write;
> >