All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Chen, Zide" <zide.chen@intel.com>
To: Zhao Liu <zhao1.liu@intel.com>
Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org,
	Paolo Bonzini <pbonzini@redhat.com>, Peter Xu <peterx@redhat.com>,
	Fabiano Rosas <farosas@suse.de>,
	Sandipan Das <sandipan.das@amd.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>,
	Dongli Zhang <dongli.zhang@oracle.com>,
	Dapeng Mi <dapeng1.mi@linux.intel.com>
Subject: Re: [PATCH V3 11/13] target/i386: Add pebs-fmt CPU option
Date: Wed, 22 Apr 2026 14:03:25 -0700	[thread overview]
Message-ID: <be9cf7a9-4793-4bd4-b91e-cc9e0b6696a4@intel.com> (raw)
In-Reply-To: <aeiE9ZZ5AE+uMgmN@intel.com>



On 4/22/2026 1:21 AM, Zhao Liu wrote:
> Hi Zide,
> 
> On Wed, Mar 04, 2026 at 10:07:10AM -0800, Zide Chen wrote:
>> Date: Wed, 4 Mar 2026 10:07:10 -0800
>> From: Zide Chen <zide.chen@intel.com>
>> Subject: [PATCH V3 11/13] target/i386: Add pebs-fmt CPU option
>> X-Mailer: git-send-email 2.53.0
>>
>> Similar to lbr-fmt, target/i386 does not support multi-bit CPU
>> properties, so the PEBS record format cannot be exposed as a
>> user-visible CPU feature.
>>
>> Add a pebs-fmt option to allow users to specify the PEBS format via the
>> command line.  Since the PEBS state is part of the vmstate, this option
>> is considered migratable.
>>
>> We do not support PEBS record format 0.  Although it is a valid format
>> on some very old CPUs, it is unlikely to be used in practice.  This
>> allows pebs-fmt=0 to be used to explicitly disable PEBS in the case of
>> migratable=off.
>>
>> If PEBS is not enabled, mark it as unavailable in IA32_MISC_ENABLE and
>> clear the PEBS-related bits in IA32_PERF_CAPABILITIES.
>>
>> If migratable=on on PEBS capable host and pmu is enabled:
>> - PEBS is disabled if pebs-fmt is not specified or pebs-fmt=0.
>> - PEBS is enabled if pebs-fmt is set to the same value as the host.
>>
>> When migratable=off, the behavior is similar, except that omitting
>> the pebs-fmt option does not disable PEBS.
>>
>> Signed-off-by: Zide Chen <zide.chen@intel.com>
> 
> ...
> 
>>      if (user_req != -1) {
>> +        if (!is_lbr_fmt && !(env->features[FEAT_1_EDX] & CPUID_DTS)) {
>> +            error_setg(errp, "vPMU: %s is unsupported without Debug Store", name);
>> +            return false;
>> +        }
>> +
> 
> This is a general code path to check user_req != -1... but
> 
>> diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
>> index 1d0047d037c7..60bf3899852a 100644
>> --- a/target/i386/kvm/kvm-cpu.c
>> +++ b/target/i386/kvm/kvm-cpu.c
>> @@ -231,6 +231,7 @@ static void kvm_cpu_instance_init(CPUState *cs)
>>      }
>>  
>>      cpu->lbr_fmt = -1;
>> +    cpu->pebs_fmt = -1;
> 
> -1 is only set for KVM, so other accelerators have lbr_fmt=0 by default.
> 
> This will cause make check fail:
> 
> stderr:
> qemu-system-x86_64: vPMU: pebs is unsupported without Debug Store
> Broken pipe
> ../tests/qtest/libqtest.c:201: kill_qemu() tried to terminate QEMU process but encountered exit status 1 (expected 0)
> 
> (test program exited with status code -6)
> 
> So I think the initialization should be placed in the general code path
> as well (x86_cpu_initfn()) - and move lbr_fmt initialization back to
> general x86 codes.

Yes, the related changes in patch 9/13 should be reverted.

> 
> Thanks,
> Zhao
> 


  reply	other threads:[~2026-04-22 21:03 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-04 18:06 [PATCH V3 00/13] target/i386: Misc PMU fixes and enabling Zide Chen
2026-03-04 18:07 ` [PATCH V3 01/13] target/i386: Disable unsupported BTS for guest Zide Chen
2026-04-22 10:07   ` Zhao Liu
2026-04-24 18:23     ` Chen, Zide
2026-03-04 18:07 ` [PATCH V3 02/13] target/i386: Don't save/restore PERF_GLOBAL_OVF_CTRL MSRs Zide Chen
2026-03-04 18:07 ` [PATCH V3 03/13] target/i386: Gate enable_pmu on kvm_enabled() Zide Chen
2026-03-04 18:07 ` [PATCH V3 04/13] target/i386: Adjust maximum number of PMU counters Zide Chen
2026-03-06  3:02   ` Mi, Dapeng
2026-03-04 18:07 ` [PATCH V3 05/13] target/i386: Support full-width writes for perf counters Zide Chen
2026-03-04 18:07 ` [PATCH V3 06/13] target/i386: Increase MSR_BUF_SIZE and split KVM_[GET/SET]_MSRS calls Zide Chen
2026-03-06  3:09   ` Mi, Dapeng
2026-03-04 18:07 ` [PATCH V3 07/13] target/i386: Add get/set/migrate support for legacy PEBS MSRs Zide Chen
2026-03-06  3:17   ` Mi, Dapeng
2026-03-04 18:07 ` [PATCH V3 08/13] target/i386: Make some PEBS features user-visible Zide Chen
2026-03-06  3:25   ` Mi, Dapeng
2026-03-04 18:07 ` [PATCH V3 09/13] target/i386: Clean up LBR format handling Zide Chen
2026-03-04 18:07 ` [PATCH V3 10/13] target/i386: Refactor " Zide Chen
2026-03-04 18:07 ` [PATCH V3 11/13] target/i386: Add pebs-fmt CPU option Zide Chen
2026-03-06  5:23   ` Mi, Dapeng
2026-04-22  8:21   ` Zhao Liu
2026-04-22 21:03     ` Chen, Zide [this message]
2026-03-04 18:07 ` [PATCH V3 12/13] target/i386: Clean up Intel Debug Store feature dependencies Zide Chen
2026-03-06  5:34   ` Mi, Dapeng
2026-03-16  3:21   ` Chenyi Qiang
2026-03-16  6:57     ` Xiaoyao Li
2026-03-16 18:17       ` Chen, Zide
2026-03-16 18:17     ` Chen, Zide
2026-03-04 18:07 ` [PATCH V3 13/13] target/i386: Add Topdown metrics feature support Zide Chen
2026-03-06  5:37   ` Mi, Dapeng

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=be9cf7a9-4793-4bd4-b91e-cc9e0b6696a4@intel.com \
    --to=zide.chen@intel.com \
    --cc=dapeng1.mi@linux.intel.com \
    --cc=dongli.zhang@oracle.com \
    --cc=farosas@suse.de \
    --cc=kvm@vger.kernel.org \
    --cc=pbonzini@redhat.com \
    --cc=peterx@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=sandipan.das@amd.com \
    --cc=xiaoyao.li@intel.com \
    --cc=zhao1.liu@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.