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aW4gaXQKPj4gb3AgdGVtcGxhdGVzIGZvciBlYWNoIG9mIHRoaXMgb3AsIGFzIHdlbGwgYXMgZW51 bSBzcGluYW5kX3Byb3RvY29sCj4+IGRlbm90aW5nIHByb3RvY29sIG9mIGFsbCB0aGVzZSBvcHMu Cj4+Cj4+IFdlIHJlcXVpcmUgdGhlc2UgbmV3IG9wIHRlbXBsYXRlcyBiZWNhdXNlIG9mIGRldmlh dGlvbiBpbiBzdGFuZGFyZAo+PiBTUElOQU5EIG9wcyBieSBtYW51ZmFjdHVyZXJzIGFuZCBhbHNv IGR1ZSB0byBjaGFuZ2VzIHdoZW4gdGhlcmUgaXMgYQo+PiBjaGFuZ2UgaW4gU1BJIHByb3RvY29s L21vZGUuIFRoaXMgcHJldmVudHMgdGhlIGNvcmUgZnJvbSBsaXZlLXBhdGNoaW5nCj4+IGFuZCB2 ZW5kb3Itc3BlY2lmaWMgYWRqdXN0bWVudHMgaW4gb3BzLgo+Pgo+PiBEZWZpbmUgJ2N0cmxfb3Bz JywgYWRkIG1hY3JvcyB0byBpbml0aWFsaXplIGl0IGFuZCBhZGQgaXQgaW4KPj4gc3BpbmFuZF9k ZXZpY2UuCj4+Cj4+IFNpZ25lZC1vZmYtYnk6IEFwdXJ2YSBOYW5kYW4gPGEtbmFuZGFuQHRpLmNv bT4KPj4gLS0tCj4+ICAgaW5jbHVkZS9saW51eC9tdGQvc3BpbmFuZC5oIHwgMzMgKysrKysrKysr KysrKysrKysrKysrKysrKysrKysrKysrCj4+ICAgMSBmaWxlIGNoYW5nZWQsIDMzIGluc2VydGlv bnMoKykKPj4KPj4gZGlmZiAtLWdpdCBhL2luY2x1ZGUvbGludXgvbXRkL3NwaW5hbmQuaCBiL2lu Y2x1ZGUvbGludXgvbXRkL3NwaW5hbmQuaAo+PiBpbmRleCA0MzlkOGNlNDBlMWQuLmU1ZGY2MjIw ZWMxZSAxMDA2NDQKPj4gLS0tIGEvaW5jbHVkZS9saW51eC9tdGQvc3BpbmFuZC5oCj4+ICsrKyBi L2luY2x1ZGUvbGludXgvbXRkL3NwaW5hbmQuaAo+PiBAQCAtMzU2LDYgKzM1NiwzNSBAQCBzdHJ1 Y3Qgc3BpbmFuZF9vcF92YXJpYW50cyB7Cj4+ICAgCQkJc2l6ZW9mKHN0cnVjdCBzcGlfbWVtX29w KSwJCQlcCj4+ICAgCX0KPj4gICAKPj4gK3N0cnVjdCBzcGluYW5kX2N0cmxfb3BzIHsKPj4gKwlj b25zdCBzdHJ1Y3Qgewo+PiArCQlzdHJ1Y3Qgc3BpX21lbV9vcCByZXNldDsKPj4gKwkJc3RydWN0 IHNwaV9tZW1fb3AgZ2V0X2ZlYXR1cmU7Cj4+ICsJCXN0cnVjdCBzcGlfbWVtX29wIHNldF9mZWF0 dXJlOwo+PiArCQlzdHJ1Y3Qgc3BpX21lbV9vcCB3cml0ZV9lbmFibGU7Cj4+ICsJCXN0cnVjdCBz cGlfbWVtX29wIGJsb2NrX2VyYXNlOwo+PiArCQlzdHJ1Y3Qgc3BpX21lbV9vcCBwYWdlX3JlYWQ7 Cj4+ICsJCXN0cnVjdCBzcGlfbWVtX29wIHByb2dyYW1fZXhlY3V0ZTsKPj4gKwl9IG9wczsKPj4g Kwljb25zdCBlbnVtIHNwaW5hbmRfcHJvdG9jb2wgcHJvdG9jb2w7Cj4gRG8geW91IHJlYWxseSBu ZWVkIHRoYXQgcHJvdG9jb2wgZmllbGQ/Cj4KPj4gK307Cj4+ICsKPj4gKyNkZWZpbmUgU1BJTkFO RF9DVFJMX09QUyhfX3Byb3RvY29sLCBfX3Jlc2V0LCBfX2dldF9mZWF0dXJlLCBfX3NldF9mZWF0 dXJlLAlcCj4+ICsJCQkgX193cml0ZV9lbmFibGUsIF9fYmxvY2tfZXJhc2UsIF9fcGFnZV9yZWFk LAkJXAo+PiArCQkJIF9fcHJvZ3JhbV9leGVjdXRlKQkJCQkJXAo+PiArCXsJCQkJCQkJCQlcCj4+ ICsJCS5vcHMgPSB7CQkJCQkJCVwKPj4gKwkJCS5yZXNldCA9IF9fcmVzZXQsCQkJCQlcCj4+ICsJ CQkuZ2V0X2ZlYXR1cmUgPSBfX2dldF9mZWF0dXJlLAkJCQlcCj4+ICsJCQkuc2V0X2ZlYXR1cmUg PSBfX3NldF9mZWF0dXJlLAkJCQlcCj4+ICsJCQkud3JpdGVfZW5hYmxlID0gX193cml0ZV9lbmFi bGUsCQkJCVwKPj4gKwkJCS5ibG9ja19lcmFzZSA9IF9fYmxvY2tfZXJhc2UsCQkJCVwKPj4gKwkJ CS5wYWdlX3JlYWQgPSBfX3BhZ2VfcmVhZCwJCQkJXAo+PiArCQkJLnByb2dyYW1fZXhlY3V0ZSA9 IF9fcHJvZ3JhbV9leGVjdXRlLAkJCVwKPj4gKwkJfSwJCQkJCQkJCVwKPj4gKwkJLnByb3RvY29s ID0gX19wcm90b2NvbCwJCQkJCQlcCj4+ICsJfQo+PiArCj4+ICAgLyoqCj4+ICAgICogc3BpbmFu ZF9lY2NfaW5mbyAtIGRlc2NyaXB0aW9uIG9mIHRoZSBvbi1kaWUgRUNDIGltcGxlbWVudGVkIGJ5 IGEgU1BJIE5BTkQKPj4gICAgKgkJICAgICAgY2hpcAo+PiBAQCAtNDY4LDYgKzQ5Nyw4IEBAIHN0 cnVjdCBzcGluYW5kX2Rpcm1hcCB7Cj4+ICAgICogQGRhdGFfb3BzLnJlYWRfY2FjaGU6IHJlYWQg Y2FjaGUgb3AgdGVtcGxhdGUKPj4gICAgKiBAZGF0YV9vcHMud3JpdGVfY2FjaGU6IHdyaXRlIGNh Y2hlIG9wIHRlbXBsYXRlCj4+ICAgICogQGRhdGFfb3BzLnVwZGF0ZV9jYWNoZTogdXBkYXRlIGNh Y2hlIG9wIHRlbXBsYXRlCj4+ICsgKiBAY3RybF9vcHM6IHZhcmlvdXMgU1BJIG1lbSBvcCB0ZW1w bGF0ZXMgZm9yIGhhbmRsaW5nIHRoZSBmbGFzaCBkZXZpY2UsIGkuZS4KPj4gKyAqCSAgICAgIG5v biBwYWdlLXJlYWQvd3JpdGUgb3BzLgo+PiAgICAqIEBzZWxlY3RfdGFyZ2V0OiBzZWxlY3QgYSBz cGVjaWZpYyB0YXJnZXQvZGllLiBVc3VhbGx5IGNhbGxlZCBiZWZvcmUgc2VuZGluZwo+PiAgICAq CQkgICBhIGNvbW1hbmQgYWRkcmVzc2luZyBhIHBhZ2Ugb3IgYW4gZXJhc2VibG9jayBlbWJlZGRl ZCBpbgo+PiAgICAqCQkgICB0aGlzIGRpZS4gT25seSByZXF1aXJlZCBpZiB5b3VyIGNoaXAgZXhw b3NlcyBzZXZlcmFsIGRpZXMKPj4gQEAgLTQ5OCw2ICs1MjksOCBAQCBzdHJ1Y3Qgc3BpbmFuZF9k ZXZpY2Ugewo+PiAgIAkJY29uc3Qgc3RydWN0IHNwaV9tZW1fb3AgKnVwZGF0ZV9jYWNoZTsKPj4g ICAJfSBkYXRhX29wczsKPj4gICAKPj4gKwljb25zdCBzdHJ1Y3Qgc3BpbmFuZF9jdHJsX29wcyAq Y3RybF9vcHM7Cj4+ICsKPiBPa2F5LCBJIGhhZCBzb21ldGhpbmcgc2xpZ2h0bHkgZGlmZmVyZW50 IGluIG1pbmQuIEZpcnN0LCBJJ2QgcHV0IGFsbAo+IHRlbXBsYXRlcyBpbiBhIHN0cnVjdDoKPgo+ IHN0cnVjdCBzcGluYW5kX29wX3RlbXBsYXRlcyB7Cj4gCWNvbnN0IHN0cnVjdCBzcGlfbWVtX29w ICpyZWFkX2NhY2hlOwo+IAljb25zdCBzdHJ1Y3Qgc3BpX21lbV9vcCAqd3JpdGVfY2FjaGU7Cj4g CWNvbnN0IHN0cnVjdCBzcGlfbWVtX29wICp1cGRhdGVfY2FjaGU7Cj4gCWNvbnN0IHN0cnVjdCBz cGlfbWVtX29wICpyZXNldDsKPiAJY29uc3Qgc3RydWN0IHNwaV9tZW1fb3AgKmdldF9mZWF0dXJl Owo+IAljb25zdCBzdHJ1Y3Qgc3BpX21lbV9vcCAqc2V0X2ZlYXR1cmU7Cj4gCWNvbnN0IHN0cnVj dCBzcGlfbWVtX29wICp3cml0ZV9lbmFibGU7Cj4gCWNvbnN0IHN0cnVjdCBzcGlfbWVtX29wICpi bG9ja19lcmFzZTsKPiAJY29uc3Qgc3RydWN0IHNwaV9tZW1fb3AgKnBhZ2VfbG9hZDsKPiAJY29u c3Qgc3RydWN0IHNwaV9tZW1fb3AgKnByb2dyYW1fZXhlY3V0ZTsKPiB9Owo+Cj4gVGhlbiwgYXQg dGhlIHNwaW5hbmQgbGV2ZWwsIEknZCBkZWZpbmUgYW4gYXJyYXkgb2YgdGVtcGxhdGVzOgo+Cj4g ZW51bSBzcGluYW5kX3Byb3RvY29sIHsKPiAJU1BJTkFORF8xU18xU18xUywKPiAJU1BJTkFORF8y U18yU18yUywKPiAJU1BJTkFORF80U180U180UywKPiAJU1BJTkFORF84U184U184UywKPiAJU1BJ TkFORF84RF84RF84RCwKPiAJU1BJTkFORF9OVU1fUFJPVE9DT0xTLAo+IH07Cj4KPiBzdHJ1Y3Qg c3BpbmFuZF9kZXZpY2Ugewo+IAkuLi4KPiAJZW51bSBzcGluYW5kX3Byb3RvY29sIHByb3RvY29s Owo+IAljb25zdCBzdHJ1Y3Qgc3BpbmFuZF9vcF90ZW1wbGF0ZXMgKm9wX3RlbXBsYXRlc1tTUElO QU5EX05VTV9QUk9UT0NPTFNdOwo+IAkuLi4KPiB9Owo+Cj4gVGhpcyB3YXksIHlvdSBjYW4gZWFz aWx5IHBpY2sgdGhlIHJpZ2h0IHNldCBvZiBvcGVyYXRpb25zIGJhc2VkCj4gb24gdGhlIHByb3Rv Y29sL21vZGUgeW91J3JlIGluOgo+Cj4gI2RlZmluZSBzcGluYW5kX2dldF9vcF90ZW1wbGF0ZShz cGluYW5kLCBvcG5hbWUpIFwKPiAJKChzcGluYW5kKS0+b3BfdGVtcGxhdGVzWyhzcGluYW5kKS0+ cHJvdG9jb2xdLT5vcG5hbWUpCj4KPiBzdGF0aWMgaW50IHNwaW5hbmRfcmVhZF9yZWdfb3Aoc3Ry dWN0IHNwaW5hbmRfZGV2aWNlICpzcGluYW5kLCB1OCByZWcsIHU4ICp2YWwpCj4gewo+IAlzdHJ1 Y3Qgc3BpX21lbV9vcCBvcCA9ICpzcGluYW5kX2dldF9vcF90ZW1wbGF0ZShzcGluYW5kLCBnZXRf ZmVhdHVyZSk7Cj4gCWludCByZXQ7Cj4KPiAJLi4uCj4gfQoKSSBmaW5kIGEgY291cGxlIG9mIGlz c3VlcyB3aXRoIHRoaXPCoCBtZXRob2QsCgoxLiByZWFkX2NhY2hlLCB3cml0ZV9jYWNoZSwgdXBk YXRlX2NhY2hlIG9wIHRlbXBsYXRlcyBkb24ndCBmaXQgd2VsbCAKd2l0aCB0aGUgb3RoZXIgbm9u LWRhdGEgb3BzLCBhcwp0aGVzZSBkYXRhIG9wcyBhcmUgdXNlZCB0byBjcmVhdGUgYSBkaXJtYXAs IGFuZCB0aGF0IGNhbiBiZSBkb25lIG9ubHkgCm9uY2UgYXQgcHJvYmUgdGltZS4gSGVuY2UsIHRo ZXJlCmlzIGEgZGlmZmVyZW50IG1lY2hhbmlzbSBvZiBzZWxlY3Rpbmcgb2YgZGF0YSBvcHMgYW5k IG5vbi1kYXRhIG9wcy4gCkhlbmNlLCB0aGlzIGRpdmlzaW9uIGluIHRoZSBvcCB0ZW1wbGF0ZXMK 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(ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 21FFXqVL025861; Tue, 15 Feb 2022 09:33:53 -0600 Message-ID: Date: Tue, 15 Feb 2022 21:03:52 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.5.0 Subject: Re: [PATCH v3 05/17] mtd: spinand: Define ctrl_ops for non-page read/write op templates Content-Language: en-US To: Boris Brezillon CC: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Mark Brown , Patrice Chotard , Christophe Kerello , Daniel Palmer , Alexander Lobakin , , , , References: <20220101074250.14443-1-a-nandan@ti.com> <20220101074250.14443-6-a-nandan@ti.com> <20220103110107.45594e78@collabora.com> From: Apurva Nandan In-Reply-To: <20220103110107.45594e78@collabora.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Hi Boris, On 03/01/22 15:31, Boris Brezillon wrote: > On Sat, 1 Jan 2022 13:12:38 +0530 > Apurva Nandan wrote: > >> 'ctrl_ops' are op templates for non-page read/write operations, >> which are: reset, get_feature, set_feature, write_enable, block_erase, >> page_read and program_execute ops. The 'ctrl_ops' struct contains in it >> op templates for each of this op, as well as enum spinand_protocol >> denoting protocol of all these ops. >> >> We require these new op templates because of deviation in standard >> SPINAND ops by manufacturers and also due to changes when there is a >> change in SPI protocol/mode. This prevents the core from live-patching >> and vendor-specific adjustments in ops. >> >> Define 'ctrl_ops', add macros to initialize it and add it in >> spinand_device. >> >> Signed-off-by: Apurva Nandan >> --- >> include/linux/mtd/spinand.h | 33 +++++++++++++++++++++++++++++++++ >> 1 file changed, 33 insertions(+) >> >> diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h >> index 439d8ce40e1d..e5df6220ec1e 100644 >> --- a/include/linux/mtd/spinand.h >> +++ b/include/linux/mtd/spinand.h >> @@ -356,6 +356,35 @@ struct spinand_op_variants { >> sizeof(struct spi_mem_op), \ >> } >> >> +struct spinand_ctrl_ops { >> + const struct { >> + struct spi_mem_op reset; >> + struct spi_mem_op get_feature; >> + struct spi_mem_op set_feature; >> + struct spi_mem_op write_enable; >> + struct spi_mem_op block_erase; >> + struct spi_mem_op page_read; >> + struct spi_mem_op program_execute; >> + } ops; >> + const enum spinand_protocol protocol; > Do you really need that protocol field? > >> +}; >> + >> +#define SPINAND_CTRL_OPS(__protocol, __reset, __get_feature, __set_feature, \ >> + __write_enable, __block_erase, __page_read, \ >> + __program_execute) \ >> + { \ >> + .ops = { \ >> + .reset = __reset, \ >> + .get_feature = __get_feature, \ >> + .set_feature = __set_feature, \ >> + .write_enable = __write_enable, \ >> + .block_erase = __block_erase, \ >> + .page_read = __page_read, \ >> + .program_execute = __program_execute, \ >> + }, \ >> + .protocol = __protocol, \ >> + } >> + >> /** >> * spinand_ecc_info - description of the on-die ECC implemented by a SPI NAND >> * chip >> @@ -468,6 +497,8 @@ struct spinand_dirmap { >> * @data_ops.read_cache: read cache op template >> * @data_ops.write_cache: write cache op template >> * @data_ops.update_cache: update cache op template >> + * @ctrl_ops: various SPI mem op templates for handling the flash device, i.e. >> + * non page-read/write ops. >> * @select_target: select a specific target/die. Usually called before sending >> * a command addressing a page or an eraseblock embedded in >> * this die. Only required if your chip exposes several dies >> @@ -498,6 +529,8 @@ struct spinand_device { >> const struct spi_mem_op *update_cache; >> } data_ops; >> >> + const struct spinand_ctrl_ops *ctrl_ops; >> + > Okay, I had something slightly different in mind. First, I'd put all > templates in a struct: > > struct spinand_op_templates { > const struct spi_mem_op *read_cache; > const struct spi_mem_op *write_cache; > const struct spi_mem_op *update_cache; > const struct spi_mem_op *reset; > const struct spi_mem_op *get_feature; > const struct spi_mem_op *set_feature; > const struct spi_mem_op *write_enable; > const struct spi_mem_op *block_erase; > const struct spi_mem_op *page_load; > const struct spi_mem_op *program_execute; > }; > > Then, at the spinand level, I'd define an array of templates: > > enum spinand_protocol { > SPINAND_1S_1S_1S, > SPINAND_2S_2S_2S, > SPINAND_4S_4S_4S, > SPINAND_8S_8S_8S, > SPINAND_8D_8D_8D, > SPINAND_NUM_PROTOCOLS, > }; > > struct spinand_device { > ... > enum spinand_protocol protocol; > const struct spinand_op_templates *op_templates[SPINAND_NUM_PROTOCOLS]; > ... > }; > > This way, you can easily pick the right set of operations based > on the protocol/mode you're in: > > #define spinand_get_op_template(spinand, opname) \ > ((spinand)->op_templates[(spinand)->protocol]->opname) > > static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val) > { > struct spi_mem_op op = *spinand_get_op_template(spinand, get_feature); > int ret; > > ... > } I find a couple of issues with this  method, 1. read_cache, write_cache, update_cache op templates don't fit well with the other non-data ops, as these data ops are used to create a dirmap, and that can be done only once at probe time. Hence, there is a different mechanism of selecting of data ops and non-data ops. Hence, this division in the op templates struct as data_ops and ctrl_ops is required. Currently, the core only supports using a single protocol for data ops, chosen at the time of probing. 2. If we use this single op_templates struct, I can't think of any good way to initialize these in the manufacturers driver (winbond.c), refer to 17th patch in this series. Could you please suggest a macro implementation also for winbond.c with the suggested op_templates struct. Thanks, Apurva Nandan