From: Andrew Cooper <Andrew.Cooper3@citrix.com>
To: Jan Beulich <jbeulich@suse.com>,
"xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: Wei Liu <wl@xen.org>, Roger Pau Monne <roger.pau@citrix.com>
Subject: Re: [PATCH 03/11] x86emul: handle AVX512-FP16 Map5 arithmetic insns
Date: Wed, 10 Aug 2022 17:41:44 +0000 [thread overview]
Message-ID: <bf655eed-288e-dfa2-34a8-e2d560304272@citrix.com> (raw)
In-Reply-To: <6721f404-e2f9-b686-009c-4c465a5a1e3f@suse.com>
On 15/06/2022 11:28, Jan Beulich wrote:
> This encoding space is a very sparse clone of the "twobyte" one. Re-use
> that table, as the entries corresponding to invalid opcodes in Map5 are
> simply benign with simd_size forced to other than simd_none (preventing
> undue memory reads in SrcMem handling early in x86_emulate()).
This...
> --- a/xen/arch/x86/x86_emulate/decode.c
> +++ b/xen/arch/x86/x86_emulate/decode.c
> @@ -1219,9 +1219,18 @@ int x86emul_decode(struct x86_emulate_st
> opcode |= MASK_INSR(0x0f3a, X86EMUL_OPC_EXT_MASK);
> d = twobyte_table[0x3a].desc;
> break;
> +
> + case evex_map5:
> + if ( !evex_encoded() )
> + {
> default:
> - rc = X86EMUL_UNRECOGNIZED;
> - goto done;
> + rc = X86EMUL_UNRECOGNIZED;
> + goto done;
> + }
> + opcode |= MASK_INSR(5, X86EMUL_OPC_EXT_MASK);
> + d = twobyte_table[b].desc;
> + s->simd_size = twobyte_table[b].size ?: simd_other;
... needs a comment here, and ...
> + break;
> }
> }
> else if ( s->ext < ext_8f08 + ARRAY_SIZE(xop_table) )
> @@ -1443,6 +1452,24 @@ int x86emul_decode(struct x86_emulate_st
> }
> break;
>
> + case ext_map5:
> + switch ( b )
> + {
> + default:
> + if ( !(s->evex.pfx & VEX_PREFIX_DOUBLE_MASK) )
> + s->fp16 = true;
> + break;
> +
> + case 0x2e: case 0x2f: /* v{,u}comish */
> + if ( !s->evex.pfx )
> + s->fp16 = true;
> + s->simd_size = simd_none;
> + break;
> + }
> +
> + disp8scale = decode_disp8scale(twobyte_table[b].d8s, s);
... here.
Because otherwise the code reads as if it's buggy, with map5 referencing
the twobyte_table.
~Andrew
next prev parent reply other threads:[~2022-08-10 17:42 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-15 10:26 [PATCH 00/11] x86: support AVX512-FP16 Jan Beulich
2022-06-15 10:27 ` [PATCH 01/11] x86/CPUID: AVX512-FP16 definitions Jan Beulich
2022-08-10 16:53 ` Andrew Cooper
2022-06-15 10:27 ` [PATCH 02/11] x86emul: handle AVX512-FP16 insns encoded in 0f3a opcode map Jan Beulich
2022-08-10 17:03 ` Andrew Cooper
2022-08-11 6:11 ` Jan Beulich
2022-06-15 10:28 ` [PATCH 03/11] x86emul: handle AVX512-FP16 Map5 arithmetic insns Jan Beulich
2022-08-10 17:41 ` Andrew Cooper [this message]
2022-06-15 10:28 ` [PATCH 04/11] x86emul: handle AVX512-FP16 move insns Jan Beulich
2022-08-10 18:04 ` Andrew Cooper
2022-08-11 6:17 ` Jan Beulich
2022-06-15 10:28 ` [PATCH 05/11] x86emul: handle AVX512-FP16 fma-like insns Jan Beulich
2022-08-10 18:14 ` Andrew Cooper
2022-08-11 6:29 ` Jan Beulich
2022-06-15 10:29 ` [PATCH 06/11] x86emul: handle AVX512-FP16 Map6 misc insns Jan Beulich
2022-08-10 18:19 ` Andrew Cooper
2022-06-15 10:29 ` [PATCH 07/11] x86emul: handle AVX512-FP16 complex multiplication insns Jan Beulich
2022-08-10 18:59 ` Andrew Cooper
2022-06-15 10:30 ` [PATCH 08/11] x86emul: handle AVX512-FP16 conversion to/from (packed) int16 insns Jan Beulich
2022-08-10 19:01 ` Andrew Cooper
2022-08-11 6:33 ` Jan Beulich
2022-06-15 10:30 ` [PATCH 09/11] x86emul: handle AVX512-FP16 floating point conversion insns Jan Beulich
2022-08-10 19:07 ` Andrew Cooper
2022-06-15 10:31 ` [PATCH 10/11] x86emul: handle AVX512-FP16 conversion to/from (packed) int{32,64} insns Jan Beulich
2022-08-10 19:09 ` Andrew Cooper
2022-08-11 6:37 ` Jan Beulich
2022-06-15 10:32 ` [PATCH 11/11] x86emul: AVX512-FP16 testing Jan Beulich
2022-08-10 19:14 ` Andrew Cooper
2022-08-11 6:43 ` Jan Beulich
2022-07-06 7:31 ` [PATCH 00/11] x86: support AVX512-FP16 Henry Wang
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