From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from mga17.intel.com ([192.55.52.151]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fDF9z-0004FF-Fc for speck@linutronix.de; Mon, 30 Apr 2018 22:12:31 +0200 Subject: [MODERATED] Re: [patch V7 15/15] SBB 15 References: <20180429193045.711908246@linutronix.de> <20180429193938.717571156@linutronix.de> From: Tim Chen Message-ID: Date: Mon, 30 Apr 2018 13:12:28 -0700 MIME-Version: 1.0 In-Reply-To: Content-Type: multipart/mixed; boundary="iEWPvezgPUaLisy5zgi8PwyQaSYsnWtej"; protected-headers="v1" To: speck@linutronix.de List-ID: This is an OpenPGP/MIME encrypted message (RFC 4880 and 3156) --iEWPvezgPUaLisy5zgi8PwyQaSYsnWtej Content-Type: multipart/mixed; boundary="FIqd43mRuF4KllciS1yWX1IATSUpXmaOW" --FIqd43mRuF4KllciS1yWX1IATSUpXmaOW Content-Type: text/plain; charset=windows-1252 Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 04/30/2018 12:36 PM, speck for Thomas Gleixner wrote: > On Mon, 30 Apr 2018, speck for Tim Chen wrote: >=20 >> On 04/29/2018 12:31 PM, speck for Thomas Gleixner wrote: >> >>> +static int sbb_prctl_set(unsigned long ctrl) >>> +{ >>> + bool rds =3D !!test_tsk_thread_flag(current, TIF_RDS); >>> + >>> + if (ssb_mode !=3D SPEC_STORE_BYPASS_PRCTL) >>> + return -ENXIO; >> >> Perhaps we should not use the prctl if we don't have >> the SSB bug. Something like: >> >> if (ssb_mode !=3D SPEC_STORE_BYPASS_PRCTL || >> !boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS)) >> return -ENXIO;=20 >=20 > What? If the CPU does not have the bug then the kernel does not enable > PRCTL mode at all unless >=20 > 1) RDS is available >=20 > AND >=20 > 2) The user enforced PRTCL mode on the kernel command line. >=20 > So what exactly are you trying to solve? Right, we will only do the PRCTL only for the case when admin explicitly ask for it at kernel command line. We'll let the admin have the choice to do prctl, if he explicitly ask for it. Even though it is unnecessary for cpus that don't have the SSB bug and there will be some added cost in changing the MSR on context switches. Just want to clear in my mind that this is the choice we are making. Tim --FIqd43mRuF4KllciS1yWX1IATSUpXmaOW-- --iEWPvezgPUaLisy5zgi8PwyQaSYsnWtej--