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From: Dinh Nguyen <dinguyen@kernel.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] ARM: socfpga: Add boot0 hook to prevent SPL corruption
Date: Wed, 16 Nov 2016 13:27:14 -0600	[thread overview]
Message-ID: <bfb7a74b-bd4f-5ce3-c7f2-e3cc16eb5549@kernel.org> (raw)
In-Reply-To: <20161116165414.11020-1-marex@denx.de>



On 11/16/2016 10:54 AM, Marek Vasut wrote:
> Valid Altera SoCFPGA preloader image must contain special data at
> offsets 0x40, 0x44, 0x48 and valid instructions at address 0x4c or
> 0x50. These addresses are by default used by U-Boot's vector table
> and a piece of reset handler, thus a valid preloader corrupts those
> addresses slightly. While this works most of the time, this can and
> does prevent the board from rebooting sometimes and triggering this
> issue may even depend on compiler.
> 
> The problem is that when SoCFPGA performs warm reset, it checks the
> addresses 0x40..0x4b in SRAM for a valid preloader signature and
> header checksum. If those are found, it jumps to address 0x4c or
> 0x50 (this is unclear). These addresses are populated by the first
> few instructions of arch/arm/cpu/armv7/start.S:
> 
> ffff0040 <data_abort>:
> ffff0040:       ebfffffe        bl      ffff0040 <data_abort>
> 
> ffff0044 <reset>:
> ffff0044:       ea000012        b       ffff0094 <save_boot_params>
> 
> ffff0048 <save_boot_params_ret>:
> ffff0048:       e10f0000        mrs     r0, CPSR
> ffff004c:       e200101f        and     r1, r0, #31
> ffff0050:       e331001a        teq     r1, #26
> 
> Without this patch, the CPU will enter the code at 0xffff004c or
> 0xffff0050 , at which point the value of r0 and r1 registers is
> undefined. Moreover, jumping directly to the preloader entry point
> at address 0xffff0000 will also fail, because address 0xffff004.
> is invalid and contains the preloader magic.
> 
> Add BOOT0 hook which reserves the area at offset 0x40..0x5f and
> populates offset 0x50 with jump to the entry point. This way, the
> preloader signature is stored in reserved space and can not corrupt
> the SPL code.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Stefan Roese <sr@denx.de>
> ---
>  arch/arm/Kconfig                           |  1 +
>  arch/arm/mach-socfpga/include/mach/boot0.h | 28 ++++++++++++++++++++++++++++
>  2 files changed, 29 insertions(+)
>  create mode 100644 arch/arm/mach-socfpga/include/mach/boot0.h

With this patch, I can properly do a soft reset on an Atlas DE0 Nano board.

So feel free to add:

Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>

Dinh

  reply	other threads:[~2016-11-16 19:27 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-16 16:54 [U-Boot] [PATCH] ARM: socfpga: Add boot0 hook to prevent SPL corruption Marek Vasut
2016-11-16 19:27 ` Dinh Nguyen [this message]
2016-11-16 22:39   ` Marek Vasut
2016-11-17  4:24     ` Chin Liang See
2016-11-18 19:47 ` Anatolij Gustschin

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