[Bug 107912] Please add support for PIPE_CAP_TGSI_MUL_ZERO_WINS to radeonsi - bugzilla-daemon

From: bugzilla-daemon@freedesktop.org
To: dri-devel@lists.freedesktop.org
Subject: [Bug 107912] Please add support for PIPE_CAP_TGSI_MUL_ZERO_WINS to radeonsi
Date: Wed, 12 Sep 2018 21:39:03 +0000	[thread overview]
Message-ID: <bug-107912-502@http.bugs.freedesktop.org/> (raw)

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https://bugs.freedesktop.org/show_bug.cgi?id=107912

            Bug ID: 107912
           Summary: Please add support for PIPE_CAP_TGSI_MUL_ZERO_WINS to
                    radeonsi
           Product: Mesa
           Version: git
          Hardware: Other
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: medium
         Component: Drivers/Gallium/radeonsi
          Assignee: dri-devel@lists.freedesktop.org
          Reporter: davyaxel0@gmail.com
        QA Contact: dri-devel@lists.freedesktop.org

PIPE_CAP_TGSI_MUL_ZERO_WINS is a cap currently supported by nv50, nvc0 and
r600, which means that TGSI_PROPERTY_MUL_ZERO_WINS is supported.

When enabled, the affected shaders have the behaviour 0*anything = 0 (including
inside a mad). It is used by gallium nine when available.

All GCN cards support special legacy instructions to handle the behaviour.

Since opengl compat used to be a thing "we will never support because lack of
time" and is now implemented, I thought maybe this MUL_ZERO_WINS may get added
to the new radeonsi TODO list.

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