From mboxrd@z Thu Jan 1 00:00:00 1970 From: bugzilla-daemon@bugzilla.kernel.org Subject: [Bug 172421] radeon: allow to set the TMDS frequency by a special kernel parameter Date: Fri, 23 Sep 2016 07:36:15 +0000 Message-ID: References: Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9AFF06E9F6 for ; Fri, 23 Sep 2016 07:36:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CD2382042A for ; Fri, 23 Sep 2016 07:36:17 +0000 (UTC) Received: from bugzilla2.web.kernel.org (bugzilla2.web.kernel.org [172.20.200.52]) by mail.kernel.org (Postfix) with ESMTP id D62AE2042B for ; Fri, 23 Sep 2016 07:36:15 +0000 (UTC) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org aHR0cHM6Ly9idWd6aWxsYS5rZXJuZWwub3JnL3Nob3dfYnVnLmNnaT9pZD0xNzI0MjEKCi0tLSBD b21tZW50ICMxNCBmcm9tIENocmlzdGlhbiBLw7ZuaWcgPGRlYXRoc2ltcGxlQHZvZGFmb25lLmRl PiAtLS0KKEluIHJlcGx5IHRvIFJvbGFuZCBTY2hlaWRlZ2dlciBmcm9tIGNvbW1lbnQgIzEzKQo+ IFBlcnNvbmFsbHkgSSd2ZSBhbHdheXMgdGhvdWdodCB0aGUgcmlzayBvZiBkYW1hZ2luZyBoYXJk d2FyZSB3aXRoIGFueSBraW5kCj4gb2Ygb3ZlcmNsb2NraW5nIGlzIGp1c3QgYWJvdXQgZXhhY3Rs eSB6ZXJvIGFzIGxvbmcgYXMgeW91IGRvbid0IGluY3JlYXNlCj4gdm9sdGFnZSBsZXZlbHMKClVu Zm9ydHVuYXRlbHkgdGhpcyBpcyBleGFjdGx5IHdoYXQgaGFwcGVucyBoZXJlLiBUaGUgY2xvY2sg aXMgZ2VuZXJhdGVkIGJ5IGEKdm9sdGFnZSBjb250cm9sbGVkIG9zY2lsbGF0b3IgYW5kIGZvciB0 aGUgZGVzaXJlZCByZXNvbHV0aW9uIHlvdSBuZWVkIHRvIG92ZXIKY2xvY2sgaXQgYnkgYWJvdXQg MzAtNDAlLgoKVGhhdCBpbiB0dXJuIG1lYW5zIHlvdSByYWlzZSB0aGUgdm9sdGFnZSB3YXkgb3Zl ciB0aGUgbm9taW5hbCBsaW1pdC4KClRob3NlIG9zY2lsbGF0b3JzIGFyZSBkZXNpZ25lZCB0byBo YW5kbGUgdm9sdGFnZXMgYWJvdXQgMjUwJSBvdmVyIHRoZSBub21pbmFsCmxldmVsIHdpdGhvdXQg ZnJ5aW5nIGltbWVkaWF0ZWx5LCBidXQgdGhhdCBzYXlzIGFic29sdXRlbHkgbm90aGluZyBhYm91 dCB0aGUKYWdpbmcgb2YgdGhlIGNpcmN1aXQgdW5kZXIgdGhvc2UgY29uZGl0aW9ucy4KClRoZSBQ TEwgd2UgYXJlIHRhbGtpbmcgYWJvdXQgaGVyZSBjbGVhcmx5IGlzbid0IGRlc2lnbmVkIGZvciB0 aGF0IGxldmVsIG9mCm9wZXJhdGlvbiBhbmQgZXZlbiB0aGUgY2xvc2VkIHNvdXJjZSBkcml2ZXIg KHdoaWNoIGFyZSBvdGhlcndpc2UgcmF0aGVyCmZyaWVuZGx5IHRvIG92ZXJjbG9ja2luZykgZG9u J3QgbGV0IHRoZSB1c2VyIG92ZXJyaWRlIHRoaXMgYWJzb2x1dGUgbGltaXQuCgpTbyB0aGlzIGlz IGEgY2xlYXJseSBOQUsgZnJvbSBteSBzaWRlLgoKLS0gCllvdSBhcmUgcmVjZWl2aW5nIHRoaXMg bWFpbCBiZWNhdXNlOgpZb3UgYXJlIHdhdGNoaW5nIHRoZSBhc3NpZ25lZSBvZiB0aGUgYnVnLgpf X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwg bWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0 cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK