[Bug 73338] Fan speed in idle at 40% with radeonsi and at 18% with catalyst - bugzilla-daemon

From: bugzilla-daemon@freedesktop.org
To: dri-devel@lists.freedesktop.org
Subject: [Bug 73338] Fan speed in idle at 40% with radeonsi and at 18% with catalyst
Date: Sun, 31 Aug 2014 15:26:37 +0000	[thread overview]
Message-ID: <bug-73338-502-BJWUVLUGYB@http.bugs.freedesktop.org/> (raw)
In-Reply-To: <bug-73338-502@http.bugs.freedesktop.org/>

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https://bugs.freedesktop.org/show_bug.cgi?id=73338

--- Comment #19 from Chernovsky Oleg <adonai@xaker.ru> ---
So I'm starting to implement fan speed control, at least partially. Since I
haven't found any related docs, this work is basically reverse-engineering.

Here's my mmiotrace for BONAIRE R7 260X on 3.17-rc2 so far

MARK 560.042950
R 4 580.364585 2 0xf0808010 0x3028 0x0 0         // read GRBM STATUS
R 4 580.364590 2 0xf080d034 0x76ceed57 0x0 0        // read SDMA0_STATUS_REG
R 4 580.364593 2 0xf080d834 0x46cee557 0x0 0        // read
R_00D834_DMA_STATUS_REG
R 4 580.364629 2 0xf0808010 0x3028 0x0 0          // read GRBM STATUS
R 4 580.364632 2 0xf080d034 0x76ceed57 0x0 0        // read SDMA0_STATUS_REG
R 4 580.364634 2 0xf080d834 0x46cee557 0x0 0        // read
R_00D834_DMA_STATUS_REG
W 4 580.364639 2 0xf0800200 0x80000004 0x0 0        // write to SMC_IND_INDEX_0
a 0x80000004
R 4 580.364641 2 0xf0800204 0x1000000 0x0 0        // read from SMC_IND_DATA_0
W 4 580.364643 2 0xf0800200 0x80000370 0x0 0        // write to SMC_IND_INDEX_0 
R 4 580.364645 2 0xf0800204 0x23730 0x0 0        // read from SMC_IND_DATA_0
W 4 580.364646 2 0xf0800250 0x5c 0x0 0            // write to SMC_MESSAGE_0 (!)
R 4 580.364649 2 0xf0800254 0x0 0x0 0            // wait for SMC_RESP
R 4 580.364652 2 0xf0800254 0x0 0x0 0            // ...
R 4 580.364655 2 0xf0800254 0x0 0x0 0            // ...
R 4 580.364659 2 0xf0800254 0x1 0x0 0            // got it!
R 4 580.364661 2 0xf0800254 0x1 0x0 0
W 4 580.364662 2 0xf0800200 0xc0300068 0x0 0        // write to SMC_IND_INDEX_0
R 4 580.364665 2 0xf0800204 0x40252f87 0x0 0        // read from SMC_IND_DATA_0
W 4 580.364666 2 0xf0800200 0xc0300064 0x0 0        // write to SMC_IND_INDEX_0
R 4 580.364668 2 0xf0800204 0x181431b 0x0 0        // read from SMC_IND_DATA_0
W 4 580.364670 2 0xf0800200 0xc0300064 0x0 0        // write to SMC_IND_INDEX_0
W 4 580.364671 2 0xf0800204 0x1814351 0x0 0        // read from SMC_IND_DATA_0
- this is the speed!
W 4 580.364672 2 0xf0800200 0xc030006c 0x0 0        // write to SMC_IND_INDEX_0
R 4 580.364674 2 0xf0800204 0x50cb0c00 0x0 0        // read from SMC_IND_DATA_0
W 4 580.364676 2 0xf0800200 0xc030006c 0x0 0        // write to SMC_IND_INDEX_0
W 4 580.364677 2 0xf0800204 0x50cb0c00 0x0 0        // read from SMC_IND_DATA_0
W 4 580.364678 2 0xf0800200 0xc030006c 0x0 0        // write to SMC_IND_INDEX_0
R 4 580.364681 2 0xf0800204 0x50cb0c00 0x0 0        // read from SMC_IND_DATA_0
W 4 580.364682 2 0xf0800200 0xc030006c 0x0 0        // write to SMC_IND_INDEX_0
W 4 580.364683 2 0xf0800204 0x50cb0c00 0x0 0        // read from SMC_IND_DATA_0

I've almost clearly understand the register keys here but I don't understand
some values that are written and read in the process.

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